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SN74ALS29833 Datasheet(PDF) 5 Page - Texas Instruments |
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SN74ALS29833 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 9 page SN74ALS29833 8BIT TO 9BIT PARITY BUS TRANSCEIVER SDAS119D − FEBRUARY 1987 − REVISED JANUARY 1995 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PARAMETER MEASUREMENT INFORMATION LOAD CIRCUIT 1 ALL OUTPUTS EXCEPT FOR ERROR FLAG R1 1 k Ω All Diodes 1N916 or 1N3064 From Output Under Test Test Point S2 CL (see Note A) RL = 180 Ω 1.5 V 1.5 V 1.5 V 3 V 3 V 0 0 th tsu VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Timing Input Data Input 1.5 V 1.5 V 3 V 3 V 0 0 High-Level Input Low-Level Input tw VOLTAGE WAVEFORMS PULSE DURATIONS 1.5 V 1.5 V tPHL tPLH tPLH tPHL Out-of-Phase Output 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 3 V 0 VOL VOH VOH VOL In-Phase Output VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES tPHZ tPLZ 0.5 V tPZL tPZH 1.5 V 1.5 V 1.5 V 1.5 V 3 V 0 Output Control Waveform 1 (see Note B) Waveform 2 (see Note B) ≈ 0 VOH VOL ≈ 1.5 V 0.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS VCC S1 SWITCH POSITION TABLE TEST S1 S2 tPLH tPHL tPZH tPZL tPHZ tPLZ Closed Closed Open Closed Closed Closed Closed Closed Closed Open Closed Closed ≈ 4.5 V ≈ 1.5 V Input VCC Test Point From Output Under Test CL (see Note A) LOAD CIRCUIT 2 ERROR-FLAG OUTPUT 180 Ω 510 Ω NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. Figure 1. Load Circuits and Voltage Waveforms |
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