Electronic Components Datasheet Search |
|
SN74ALS2232ANT Datasheet(PDF) 1 Page - Texas Instruments |
|
SN74ALS2232ANT Datasheet(HTML) 1 Page - Texas Instruments |
1 / 9 page SN74ALS2232A 64 × 8 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS248 – FEBRUARY 1988 – REVISED MARCH 1990 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Independent Asynchronous Inputs and Outputs D 64 Words by 8 Bits D Data Rates From 0 to 40 MHz D Fall-Through Time . . . 20 ns Typical D 3-State Outputs description This 512-bit memory uses advanced low-power Schottky IMPACT-X ™ technology and features high speed and fast fall-through times. It is organized as 64 words by 8 bits. A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The function is used as a buffer to couple two buses operating at different clock rates. This FIFO is designed to process data at rates from 0 to 40 MHz in a bit-parallel format, word by word. Data is written into memory on a low-to-high transition of the load clock (LDCK) input and is read out on a low-to-high transition of the unload clock (UNCK) input. The memory is full when the number of words clocked in exceeds by 64 the number of words clocked out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the the memory is empty, UNCK signals have no effect. Status of the FIFO memory is monitored by the FULL and EMPTY output flags. The FULL output is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. A low level on the reset (RST) input resets the internal stack control pointers and also sets EMPTY low and FULL high. The outputs are not reset to any specific logic levels. The first low-to-high transition on LDCK, either after a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the Q outputs. The first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and are at a high-impedance state when the output-enable (OE) input is low. The OE input does not effect either the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction, but is not possible in the word-depth direction. The SN74ALS2232A is characterized for operation from 0 °C to 70°C. Copyright © 1990, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. IMPACT-X is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 RST D0 D1 D2 D3 VCC D4 D5 D6 D7 FULL LDCK OE Q0 Q1 Q2 Q3 GND Q4 Q5 Q6 Q7 EMPTY UNCK 32 1 28 27 12 5 6 7 8 9 10 11 25 24 23 22 21 20 19 Q2 Q3 GND NC Q4 Q5 Q6 D2 D3 VCC NC D4 D5 D6 426 13 14 15 16 17 18 NC – No internal connection NT PACKAGE (TOP VIEW) FN PACKAGE (TOP VIEW) |
Similar Part No. - SN74ALS2232ANT |
|
Similar Description - SN74ALS2232ANT |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |