APPLICATION NOTE

2

AN206

3.0 PROGRAM EEPROM

The EEPROM must be organized into address/data pairs. The first word of the pair is the address. Table 1 be-

low shows the format of the 16-bit address:

15

Parity Bit - Odd parity over entire address/data pair

If there is a parity error, it will be reported in bit-3 of the REGB register in the Device Configura-

tion Registers (offset 0x08E).

14

Final Address

If 1, this will be the last data to be read.

If 0, there will be more data to be read after this.

13:8

Reserved - Bits must be ’0’

7:0

Target Address -- See Table 2

Table 2 shows the Target Addresses available for programming into bits 7:0 of the 16-bit address word. All oth-

er Target Addresses are reserved and must not be used.

0x00

Vendor ID

0x13A8

0x01

Device ID

0x0358 -- No slave

0x4358 -- XR17V354 slave present

0x8358 -- XR17V358 slave present

0x02

Class code [7:0]

lower 8 bits are reserved

0x0200

0x03

Class code [23:8]

0x0700

0x04

Subsystem Vendor ID

0x0000

0x05

Subsystem ID

0x0000

The second word of the pair is the data. The default values are shown in Table 2. Figure 2 shows the format of

one address/data pair: