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K4S161622E-TC70 Datasheet(PDF) 7 Page - Samsung semiconductor

Part # K4S161622E-TC70
Description  1M x 16 SDRAM
Download  42 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K4S161622E-TC70 Datasheet(HTML) 7 Page - Samsung semiconductor

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K4S161622E
CMOS SDRAM
Rev 1.1 Jan '03
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Note :
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
Symbol
-55
-60
-70
-80
-10
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
CLK cycle time
CAS Latency=3
tCC
5.5
1000
6
1000
7
1000
8
1000
10
1000
ns
1
CAS Latency=2
-
-
10
10
12
CLK to valid
output delay
CAS Latency=3
tSAC
-
5
-5.5
-5.5
-
6
-
6
ns
1, 2
CAS Latency=2
-
6
-
6
-
6
-
6
-
8
Output data
tOH
2
-
2.5
-
2.5
-
2.5
-
2.5
-
ns
2
CLK high pulse
width
CAS Latency=3
tCH
2
-
2.5
-3-3-
3.5
-
ns
3
CAS Latency=2
3
3
CLK low pulse
width
CAS Latency=3
tCL
2
-
2.5
-3-3-
3.5
-
ns
3
CAS Latency=2
3
3
Input setup time
CAS Latency=3
tSS
1.5
-
1.5
-
1.75
-2-
2.5
-
ns
3
CAS Latency=2
2
2
2
Input hold time
tSH
1-
1-1-1-1-
ns
3
CLK to output in Low-Z
tSLZ
1-
1-1-1-1-
ns
2
CLK to output
in Hi-Z
CAS Latency=3
tSHZ
-
5
-
5.5
-
5.5
-
6
-
6
ns
CAS Latency=2
-
6
-
6
-
6
-
6
-
8
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. Also, supported tRDL=2CLK for - 60 part which is distinguished by bucket code "J".
From the next generation, tRDL will be only 2CLK for every clock frequency.
Parameter
Symbol
Version
Unit
-55
-60
-70
-80
-10
CLK cycle time
tCC(min)
5.5
6
7
8
10
ns
Row active to row active delay
tRRD(min)
11
12
14
16
20
ns
RAS to CAS delay
tRCD(min)
16.5
18
20
20
20
ns
Row precharge time
tRP(min)
16.5
18
20
20
20
ns
Row active time
tRAS(min)
38.5
42
49
48
48
ns
tRAS(max)
100
us
Row cycle time
tRC(min)55
60
69
70
70
ns


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