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SN65HVDA540-Q1 Datasheet(PDF) 7 Page - Texas Instruments |
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SN65HVDA540-Q1 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 27 page SN65HVDA540-Q1, SN65HVDA541-Q1, SN65HVDA542-Q1 SN65HVDA540-5-Q1, SN65HVDA541-5-Q1, SN65HVDA542-5-Q1 www.ti.com SLLS804C – MARCH 2009 – REVISED JANUARY 2013 Floating Pins The device has integrated pull up and pull downs on critical pins to place the device into known states if the pins float. The TXD pin is pulled up to VIO to force a recessive input level if the pin floats. The STB is pulled up to the IO supply pin, VIO(SN65HVDA540 and SN65HVDA541), or VCC (SN65HVDA540-5 and SN65HVDA541-5) to force the device in standby mode (low power) if the pin floats. The S pin is pulled down to GND to force the device into normal mode if the pin floats (SN65HVDA542 and SN65HVDA542-5). CAN Bus Short Circuit Current Limiting The device has several protection features that limit the short circuit current when a CAN bus line is shorted. These include CAN driver current limiting (dominant and recessive) and TXD dominant state time out to prevent continuously driving dominant. During CAN communication the bus switches between dominant and recessive states, thus the short circuit current may be viewed either as the current during each bus state or as a DC average current. For system current and power considerations in termination resistance and common mode choke ratings the average short circuit current should be used. The device has TXD dominant state time out which prevents permanently having the higher short circuit current of dominant state. The CAN protocol also has forced state changes and recessive bits such as bit stuffing, control fields, and interframe space. These ensure there is a minimum recessive amount of time on the bus even if the data field contains a high percentage of dominant bits. APPLICATION NOTE: The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short circuit currents. The average short circuit current may be calculated with the following formula: IOS(AVG) = %Transmit * [(%REC_Bits * IOS(SS)_REC) + (%DOM_Bits * IOS(SS)_DOM)] + [%Receive * IOS(SS)_REC] Where IOS(AVG) is the average short circuit current, %Transmit is the percentage the node is transmitting CAN messages, %Receive is the percentage the node is receiving CAN messages, %REC_Bits is the percentage of recessive bits in the transmitted CAN messages, %DOM_Bits is the percentage of dominant bits in the transmitted CAN messages, IOS(SS)_REC is the recessive steady state short circuit current and IOS(SS)_DOM is the dominant steady state short circuit current. Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: SN65HVDA540-Q1 SN65HVDA541-Q1 SN65HVDA540-5-Q1 SN65HVDA541-5-Q1 SN65HVDA542-5-Q1 |
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