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SN65LVDS348PW Datasheet(PDF) 8 Page - Texas Instruments |
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SN65LVDS348PW Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 28 page  www.ti.com VID VO 10 pF 10 pF 10 pF 100 Ω† 1000 Ω 1000 Ω 100 Ω VIC V2 + + V1 + – – – VITH1 VID 0 V –100 mV 100 mV 0 V VITH2 VO VID VO SN65LVDS348 , SN65LVDT348 SN65LVDS352, SN65LVDT352 SLLS523E – FEBRUARY 2002 – REVISED MAY 2004 PARAMETER MEASUREMENT INFORMATION (continued) A. Remove for testing LVDT device. B. Input signal of 3 MHz, duty cycle of 50±0.2%, and transition time of < 1ns. C. Fixture capacitance ±20%. D. Resistors are metal film, 1% tolerance, and surface mount Figure 2. VITH1 and VITH2, Input Voltage Threshold Test Circuit and Definitions Table 1. Receiver Minimum and Maximum Failsafe Input Voltage FAILSAFE THRESHOLD TEST VOLTAGES APPLIED VOLTAGES(1) RESULTANT INPUTS Output VIA (mV) VIB (mV) VID (mV) VIC (mV) -4000 -3900 -100 -3950 L -4000 -3968 -32 -3984 H 4900 5000 -100 4950 L 4968 5000 -32 4984 H (1) Voltage applied for greater than 1.5 µs. 8 Submit Documentation Feedback |
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