D4

D3

D2

A4

A3

A2

C4

A1

B4

D1

C1

B1

C3

B3

C2

B2

PVIN

EN

PVIN

ACB

PACB

VCON

FB

ACB

PACB

PGND

SW

VDD

AUTO_BY

SW

SGND

PGND

D1

D2

D3

A1

A2

A3

C1

A4

B1

D4

C4

B4

C2

B2

C3

B3

EN

PVIN

VDD

ACB

PACB

SW

PGND

ACB

PACB

FB

VCON

PVIN

SW

AUTO_BY

PGND

SGND

LM3212

SNOSB37C – DECEMBER 2008 – REVISED APRIL 2013

www.ti.com

Connection Diagrams

16-Bump 0.5 mm DSBGA Package, Large Bump

Top View

Bottom View

PIN DESCRIPTIONS

Pin #

Name

Description

A3, A4

PVIN

Power Supply Voltage Input to the internal PFET switch.

A2

VDD

Analog Supply Input.

A1

EN

Enable Input. Set this digital input high for normal operation. For shutdown, set low. Pin has an 800 k

Ω

internal pulldown resistor.

B4, B3

SW

Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect to an

inductor.

B1

VCON

Voltage Control Analog input. VCON controls VOUT in PWM mode. When VCON < 0.15V the switches are

turned off (output in tri-state).

B2

AUTO_BY

The AUTO_BY Pin determines the bypass mode function. Set AUTO_BY high for normal automatic bypass

mode operation. Set AUTO_BY low for forced bypass (independent of the state of the EN pin). The pin has an

internal 800 k

Ω pullup resistor.

C4, C3

PGND

Power Ground

C2

SGND

Analog and Control Ground

C1

FB

Feedback Analog Input. Connect to the output at the output filter capacitor.

D3, D2

ACB

Active Current Assist source/sink and Bypass. Connect to the output at the output filter capacitor.

D4, D1

PACB

Power-to-active current/bypass circuit.

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

2

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