Electronic Components Datasheet Search |
|
PC87393-VJG Datasheet(PDF) 7 Page - National Semiconductor (TI) |
|
|
PC87393-VJG Datasheet(HTML) 7 Page - National Semiconductor (TI) |
7 / 148 page Table of Contents (Continued) 7 www.national.com 2.17 GAME PORT (GMP) CONFIGURATION .................................................................................. 62 2.17.1 Logical Device 11 (GMP) Configuration ...................................................................... 62 2.17.2 Game Port Configuration Register .............................................................................. 62 2.18 MIDI PORT (MIDI) CONFIGURATION ...................................................................................... 64 2.18.1 Logical Device 12 (MIDI) Configuration ....................................................................... 64 2.18.2 MIDI Port Configuration Register ................................................................................. 64 2.19 X-BUS CONFIGURATION .........................................................................................................65 2.19.1 Logical Device 15 (X-Bus) Configuration ..................................................................... 65 2.19.2 X-Bus I/O Range Programming ................................................................................... 65 2.19.3 X-Bus Memory Range Programming ........................................................................... 66 2.19.4 X-Bus I/O Configuration Register ................................................................................ 66 2.19.5 X-Bus I/O Base Address High Byte Register ............................................................... 68 2.19.6 X-Bus I/O Base Address Low Byte Register ............................................................... 68 2.19.7 X-Bus I/O Size Configuration Register ........................................................................ 68 2.19.8 X-Bus Memory Configuration Register ........................................................................ 69 2.19.9 X-Bus Memory Base Address High Byte Register ...................................................... 69 2.19.10 X-Bus Memory Base Address Low Byte Register ....................................................... 70 2.19.11 X-Bus Memory Size Configuration Register ................................................................ 70 2.19.12 X-Bus PIRQA and PIRQB Mapping Register .............................................................. 71 2.19.13 X-Bus PIRQC and PIRQD Mapping Register .............................................................. 71 3.0 General-Purpose Input/Output (GPIO) Port 3.1 OVERVIEW ............................................................................................................................... 72 3.2 BASIC FUNCTIONALITY ..........................................................................................................73 3.2.1 Configuration Options .................................................................................................. 73 3.2.2 Operation ..................................................................................................................... 73 3.3 EVENT HANDLING AND SYSTEM NOTIFICATION ................................................................ 74 3.3.1 Event Configuration ..................................................................................................... 74 3.3.2 System Notification ...................................................................................................... 74 3.4 GPIO PORT REGISTERS ......................................................................................................... 75 3.4.1 GPIO Pin Configuration (GPCFG) Register ................................................................ 76 3.4.2 GPIO Pin Event Routing (GPEVR) Register ............................................................... 77 3.4.3 GPIO Port Runtime Register Map ............................................................................... 77 3.4.4 GPIO Data Out Register (GPDO) ................................................................................ 78 3.4.5 GPIO Data In Register (GPDI) .................................................................................... 78 3.4.6 GPIO Event Enable Register (GPEVEN) .................................................................... 79 3.4.7 GPIO Event Status Register (GPEVST) ...................................................................... 79 4.0 WATCHDOG Timer (WDT) 4.1 OVERVIEW ............................................................................................................................... 80 4.2 FUNCTIONAL DESCRIPTION .................................................................................................. 80 4.3 WATCHDOG TIMER REGISTERS ........................................................................................... 81 4.3.1 WATCHDOG Timer Register Map ............................................................................... 81 4.3.2 WATCHDOG Timeout Register (WDTO) .................................................................... 81 4.3.3 WATCHDOG Mask Register (WDMSK) ...................................................................... 82 |
Similar Part No. - PC87393-VJG |
|
Similar Description - PC87393-VJG |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |