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PC87393 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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PC87393 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 148 page 5 www.national.com Table of Contents 1.0 Signal/Pin Connection and Description 1.1 CONNECTION DIAGRAMS ...................................................................................................... 11 1.2 BUFFER TYPES AND SIGNAL/PIN DIRECTORY .................................................................... 15 1.3 PIN MULTIPLEXING ................................................................................................................. 15 1.4 PARALLEL PORT MULTIPLEXER (PPM) ................................................................................ 17 1.5 DETAILED SIGNAL/PIN DESCRIPTIONS ................................................................................ 18 1.5.1 Bus Interface ............................................................................................................... 18 1.5.2 Clock ............................................................................................................................ 18 1.5.3 Infrared (IR) ................................................................................................................ 18 1.5.4 Floppy Disk Controller (FDC) ..................................................................................... 19 1.5.5 Game Port (PC87393 and PC87393F) ....................................................................... 20 1.5.6 General-Purpose Input/Output (GPIO) Ports (PC87392, PC87393 and PC87393F) 20 1.5.7 Musical Instrument Digital Interface (MIDI) Port (PC87393 and PC87393F) ............ 20 1.5.8 Parallel Port ................................................................................................................ 21 1.5.9 Power and Ground ..................................................................................................... 21 1.5.10 Serial Port 1 and Serial Port 2 (SP1 and SP2) ............................................................ 22 1.5.11 Strap Configuration ...................................................................................................... 23 1.5.12 Wake-Up Control ......................................................................................................... 23 1.5.13 WATCHDOG Timer ..................................................................................................... 23 1.5.14 X-Bus Extension (PC87393 and PC87393F) ............................................................. 23 1.6 INTERNAL PULL-UP AND PULL-DOWN RESISTORS ............................................................ 24 2.0 Device Architecture and Configuration 2.1 OVERVIEW ............................................................................................................................... 26 2.2 CONFIGURATION STRUCTURE AND ACCESS ..................................................................... 26 2.2.1 The Index-Data Register Pair ...................................................................................... 26 2.2.2 Banked Logical Device Registers Structure ................................................................ 28 2.2.3 Standard Logical Device Configuration Register Definitions ....................................... 29 2.2.4 Standard Configuration Registers ............................................................................... 31 2.2.5 Default Configuration Setup ........................................................................................ 32 2.2.6 Power States ...............................................................................................................32 2.2.7 Address Decoding ....................................................................................................... 32 2.3 THE CLOCK MULTIPLIER ........................................................................................................ 33 2.3.1 Functionality ................................................................................................................ 33 2.3.2 Chip Power-Up ............................................................................................................ 33 2.3.3 Disabling the Clock ...................................................................................................... 33 2.3.4 Specifications .............................................................................................................. 33 2.4 INTERRUPT SERIALIZER ........................................................................................................ 34 2.5 WAKE-UP CONTROL ............................................................................................................... 34 2.6 THE PARALLEL PORT MULTIPLEXER (PPM) ........................................................................ 34 2.6.1 PPM Power Save Mode .............................................................................................. 35 2.7 PROTECTION ........................................................................................................................... 36 2.7.1 Pin Configuration Lock ................................................................................................ 36 |
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