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SN64BCT126A Datasheet(PDF) 1 Page - Texas Instruments |
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SN64BCT126A Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page SN64BCT126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCBS051C – AUGUST 1990 – REVISED JULY 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 D State-of-the-Art BiCMOS Design Significantly Reduces ICCZ D 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers D ESD Protection Exceeds 2000 V Per MIL-STD-883 Method 3015 D High-Impedance State During Power Up and Power Down D Package Options Include Plastic Small-Outline (D) and Standard Plastic 300-mil DIPs (N) description The SN64BCT126A bus buffer features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. The SN64BCT126A is characterized for operation from – 40 °C to 85°C and 0°C to 70°C. FUNCTION TABLE (each buffer) INPUTS OUTPUT OE A Y H H H H LL L X Z logic symbol† EN 1 1OE 2 1A 1Y 3 4 2OE 5 2A 10 3OE 9 3A 13 4OE 12 4A 2Y 6 3Y 8 4Y 11 1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 4 56 2A 2Y 2OE 1 23 1A 1Y 1OE 10 98 3A 3Y 3OE 13 12 11 4A 4Y 4OE Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. D OR N PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1OE 1A 1Y 2OE 2A 2Y GND VCC 4OE 4A 4Y 3OE 3A 3Y |
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