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MC68EC030 Datasheet(PDF) 10 Page - Motorola, Inc |
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MC68EC030 Datasheet(HTML) 10 Page - Motorola, Inc |
10 / 36 page 1 0 MC68EC030 TECHNICAL DATA MOTOROLA INSTRUCTION SET OVERVIEW The MC68EC030 instruction set is listed in Table 2. Each instruction, with few exceptions, operates on bytes, words, and long words, and most instructions can use any of the 18 addressing modes. The MC68EC030 is upward source- and object-level code compatible with the M68000 Family because it supports all instructions of previous family members. Table 2. Instruction Set Mnemonic Description Mnemonic Description ABCD Add Decimal with Extend MOVE Move ADD Add MOVEA Move Address ADDA Add Address MOVE CCR Move Condition Code Register ADDI Add Immediate MOVE SR Move Status Register ADDQ Add Quick MOVE USP Move User Stack Pointer ADDX Add with Extend MOVEC Move Control Register AND Logical AND MOVEM Move Multiple Registers ANDI Logical AND Immediate MOVEP Move Peripheral ASL,ASR Arithmetic Shift Left and Right MOVEQ Move Quick Bcc Branch Conditionally MOVES Move Alternate Address Space BCHG Test Bit and Change MULS Signed Multiply BCLR Test Bit and Clear MULU Unsigned Multiply BFCHG Test Bit Field and Change NBCD Negate Decimal with Extend BFCLR Test Bit Field and Clear NEG Negate BFEXTS Signed Bit Field Extract NEGX Negate with Extend BEFXTU Unsigned Bit Field Extract NOP No Operation BFFFO Bit Field Find First One NOT Logical Complement BFINS Bit Field Insert OR Logical Inclusive OR BFSET Test Bit Field and Set ORI Logical Inclusive OR Immediate BFTST Test Bit Field PACK Pack BCD BKPT Breakpoint PEA Push Effective Address BRA Branch PFLUSH No Effect BSET Test Bit and Set PLOAD No Effect BSR Branch to Subroutine PMOVE Move to/from ACx Registers BTST Test Bit PTEST Test Address in ACx Registers CAS Compare and Swap Operands RESET Reset External Devices CAS2 Compare and Swap Dual Operands ROL, ROR Rotate Left and Right CHK Check Register Against Bound ROXL, ROXR Rotate with Extend Left and Right CHK2 Check Register Against Upper and Lower RTD Return and Deallocate Bounds RTE Return from Exception CLR Clear RTR Return and Restore Codes CMP Compare RTS Return from Subroutine CMPA Compare Address SBCD Subtract Decimal with Extend CMPI Compare Immediate Scc Set Conditionally CMPM Compare Memory to Memory STOP Stop CMP2 Compare Register Against Upper and SUB Subtract Lower Bounds SUBA Subtract Address DBcc Test Condition, Decrement and Branch SUBI Subtract Immediate DIVS,DIVSL Signed Divide SUBQ Subtract Quick DIVU, DIVUL Unsigned Divide SUBX Subtract with Extend EOR Logical Exclusive OR SWAP Swap Register Words EORI Logical Exclusive OR Immediate TAS Test Operand and Set EXG Exchange Registers TRAP Trap EXT, EXTB Sign Extend TRAPcc Trap Conditionally ILLEGAL Take Illegal Instruction Trap TRAPV Trap on Overflow JMP Jump TST Test Operand JSR Jump to Subroutine UNLK Unlink LEA Load Effective Address UNPK Unpack BCD LINK Link and Allocate LSL, LSR Logical Shift Left and Right Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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