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SN74AHC244DWR Datasheet(PDF) 9 Page - Texas Instruments |
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SN74AHC244DWR Datasheet(HTML) 9 Page - Texas Instruments |
9 / 31 page 1 2 18 1Y1 1OE 1A1 4 16 1Y2 1A2 6 14 1Y3 1A3 8 12 1Y4 1A4 19 11 9 2Y1 2OE 2A1 13 7 2Y2 2A2 15 5 2Y3 2A3 17 3 2Y4 2A4 SN54AHC244, SN74AHC244 www.ti.com SCLS226K – OCTOBER 1995 – REVISED JULY 2014 9 Detailed Description 9.1 Overview The SNx4AHC244 devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current- sinking capability of the driver. 9.2 Functional Block Diagram Figure 4. Logic Diagram (Positive Logic) 9.3 Feature Description • VCC is optimized at 5 V • Allows down voltage translation – Inputs accept VIH levels of 5.5 V • Slow edge rates minimize output ringing 9.4 Device Functional Modes Table 1. Function Table (Each 4-Bit Buffer/Driver) INPUTS OUTPUT Y OE A L H H L L L H X Z Copyright © 1995–2014, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: SN54AHC244 SN74AHC244 |
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