SN100KT5540

OCTAL ECLTOTTL TRANSLATOR

WITH 3STATE OUTPUTS

SDZS005 − DECEMBER 1989

5

POST OFFICE BOX 655303

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

TEST

tPLH

tPHL

tPZH

tPZL

tPHZ

tPLZ

S1

Open

Open

Open

Closed

Open

Closed

SWITCH POSITION TABLE

LOAD CIRCUIT

S1

From Output

Under Test

Test

Point

R2

CL

(See Note A)

R1

7 V

Open

tPHL

tPLH

ECL Input

(See Note C)

Out-of-Phase

TTL Output

ECL INPUT PROPAGATION DELAY TIMES

VOH

VOL

tf

tr

− 950 mV

− 1690 mV

50%

50%

50%

50%

tPZL

tPZH

tPLZ

Output

Control

(Low-level

enabling)

Output

Waveform 1

(See Note D)

Output

Waveform 2

(See Note D)

VOL

3 V

1.5 V

1.5 V

tPHZ

3.5 V

0.3 V

0

0.3 V

tPZL

tPZH

tPLZ

VOL

tPHZ

3.5 V

0.3 V

0

0.3 V

−950 mV

−1690 mV

Output

Control

(Low-level

enabling)

Output

Waveform 1

(See Note D)

VOH

VOH

Output

Waveform 2

(See Note D)

0

20%

80%

80%

20%

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

VOLTAGE WAVEFORMS

ECL ENABLE AND DISABLE TIMES

VOLTAGE WAVEFORMS

TTL ENABLE AND DISABLE TIMES

NOTES: A.CL includes probe and jig capacitance.

B. For TTL inputs, input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns,

tf ≤ 2.5 ns.

C. For ECL inputs, input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, Zo = 50 Ω, tr ≤ 0.7 ns,

tf ≤ 0.7 ns.

D. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2

is for an output with internal conditions such that the output is high except when disabled by the output control.

E. The outputs are measured one at a time with one transition per measurement.