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SMV320C6727BHFHM Datasheet(PDF) 8 Page - Texas Instruments

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Part # SMV320C6727BHFHM
Description  Floating-Point Digital Signal Processor
Download  112 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SMV320C6727BHFHM Datasheet(HTML) 8 Page - Texas Instruments

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.D1
.M1
.S1
.L1
Register File A
Data Path A
Cross
Paths
.D2
.M2
.S2
.L2
Register File B
Data Path B
SMV320C6727B-SP
SPRS675G – FEBRUARY 2013 – REVISED JANUARY 2014
www.ti.com
The CPU features two data paths, shown in Figure 2-1, each composed of four functional units (.D, .M, .S,
and .L) and a register file. The .D unit in each data path is a data-addressing unit that is responsible for all
data transfers between the register files and the memory. The .M functional units are dedicated for
multiplies, and the .S and .L functional units perform a general set of arithmetic, logical, and branch
functions. All instructions operate on registers as opposed to data in memory, but results stored in the
32-bit registers can be subsequently moved to memory as bytes, half-words, or words.
Figure 2-1. CPU Data Paths
The register file in each data path contains 32 32-bit registers for a total of 64 general-purpose registers.
This doubles the number of registers found on the C67x CPU core, allowing the optimizing C compiler to
pipeline more complex loops by decreasing register pressure significantly.
The four functional units in each data path of the CPU can freely share the 32 registers belonging to that
data path. Each data path also features a single cross path connected to the register file on the opposing
data path. This allows each data path to source one cross-path operand per cycle from the opposing
register file. On the C67x+ CPU, this single cross-path operand can be used by two functional units per
cycle, an improvement over the C67x CPU in which only one functional unit could use the cross-path
operand. In addition, the cross-path register read(s) are not counted as part of the limit of four reads of the
same register in a single cycle.
The C67x+ CPU executes all C67x instructions plus new floating-point instructions to improve
performance specifically during processing. These new instructions are listed in Table 2-2.
8
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Copyright © 2013–2014, Texas Instruments Incorporated
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