DS90LV032AQML

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SNLS205A – NOVEMBER 2011 – REVISED APRIL 2013

DS90LV032AQML 3V LVDS Quad CMOS Differential Line Receiver

Check for Samples: DS90LV032AQML

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FEATURES

DESCRIPTION

The DS90LV032A is a quad CMOS differential line

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•

Low chip to chip skew

receiver designed for applications requiring ultra low

•

Low differential skew

power dissipation and high data rates.

•

High impedance LVDS inputs with power-off

The DS90LV032A accepts low voltage (350 mV

•

Low power dissipation

typical) differential input signals and translates them

•

Accepts small swing (330 mV) differential

to 3V CMOS output levels. The receiver supports a

signal levels.

outputs.

•

Compatible with ANSI/TIA/EIA-644

The DS90LV032A and companion LVDS line driver

•

Operating temperature range (-55°C to +85°C)

(eg. DS90LV031A) provide a new alternative to high

•

Pin compatible with DS90C032A and

power PECL/ECL devices for high speed point-to-

DS26C32A.

point interface applications.

•

Typical Rise/Fall time is 350pS.

In addition, the DS90LV032A provides power-off high

impedance

LVDS

inputs.

This

feature

assures

minimal loading effect on the LVDS bus lines when

Connection Diagram

Figure 1. NAD0016A and NAC0016A Packages

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PRODUCTION DATA information is current as of publication date.

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Products conform to specifications per the terms of the Texas

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