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DS90CR561 Datasheet(PDF) 7 Page - Texas Instruments |
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DS90CR561 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 14 page OBSOLETE DS90CR561, DS90CR562 www.ti.com SNOS766B – JULY 1997 – REVISED APRIL 2013 Figure 8. DS90CR561 (Transmitter) LVDS Output Load and Transition Timing Figure 9. DS90CR562 (Receiver) CMOS/TTL Output Load and Transition Timing Figure 10. DS90CR561 (Transmitter) Input Clock Transition Time Measurements at Vdiff = 0V TCCS measured between earliest and latest initial LVDS edges. TxCLK OUT Differential High →Low Edge for DS90CF561 TxCLK OUT Differential Low →High Edge for DS90CR561 Figure 11. DS90CR561 (Transmitter) Channel-to-Channel Skew and Pulse Width Copyright © 1997–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: DS90CR561 DS90CR562 |
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