DS90CP04

SNLS154I – JANUARY 2002 – REVISED APRIL 2013

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Electrical Characteristics (continued)

Over recommended operating supply and temperature ranges unless other specified.

(1)

Symbol

Parameter

Conditions

Min

Max

Units

Output Channel to Channel Skew

0

50

100

ps

in Broadcast mode (any one input to

all outputs).

Alternating 1 and 0 Pattern

750 MHz

1.6

2.5

psrms

1.25 GHz

1.6

2.5

psrms

K28.5 Pattern

1.5 Gb/s

10

40

psp-p

2.5 Gb/s

27

60

psp-p

1.5 Gb/s

25

40

psp-p

2.5 Gb/s

40

70

psp-p

LVDS Output Enable Time

Time from LOAD = LH or SELx to

OUT± change from TRI-STATE to

50

150

300

ns

active.

LVDS Output Disable Time

Time from LOAD = LH or SELx to

OUT± change from active to TRI-

3

5

ns

STATE.

LVDS Switching Time

Time from LOAD = LH to new switch

50

150

ns

configuration effective for OUT±.

SELx to OUT±

Configuration select to new data at

50

150

ns

OUT±.

SCLK Clock Frequency

0

100

MHz

CSCLK Duty Cycle

Input SCLK Duty Cycle set at 50%

45

55

%

RSCLK Duty Cycle

SI–SCLK or MODE–SCLK Setup

From SI or MODE Input Data to

1.5

ns

Time

SCLK Rising Edge

SCLK–SI or SCLK–MODE Hold

From SCLK Rising Edge to SI or

1

ns

Time

MODE Input Data

SCLK to RSO or CSO Delay

From SCLK to RSO or CSO

1.5

4

ns

SCLK to RSCLK or CSCLK Delay

From SCLK to RSCLK or CSCLK

4.0

8.5

ns

|SCLK to RSCLK or

Propagation Delay Difference

1.5

4.5

ns

CSCLK–SCLK to RSO or CSO|

Logic Low to High Transition Time

20% to 80% at RSO, CSO, RSCLK,

1.5

ns

or CSCLK

Logic High to Low Transition Time

80% to 20% at RSO, CSO, RSCLK,

1.5

ns

or CSCLK

(8)

8

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