CY54FCT245T, CY74FCT245T

8-BIT TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCCS018B – MAY 1994 – REVISED NOVEMBER 2001

2

POST OFFICE BOX 655303

ORDERING INFORMATION

TA

PACKAGE†

SPEED

(ns)

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QSOP – Q

Tape and reel

3.8

CY74FCT245DTQCT

FCT245D

QSOP – Q

Tape and reel

4.1

CY74FCT245CTQCT

FCT245C

SOIC

SO

Tube

4.1

CY74FCT245CTSOC

FCT245C

SOIC – SO

Tape and reel

4.1

CY74FCT245CTSOCT

FCT245C

DIP – P

Tube

4.6

CY74FCT245ATPC

CY74FCT245ATPC

–40

°C to 85°C

QSOP – Q

Tape and reel

4.6

CY74FCT245ATQCT

FCT245A

SOIC

SO

Tube

4.6

CY74FCT245ATSOC

FCT245A

SOIC – SO

Tape and reel

4.6

CY74FCT245ATSOCT

FCT245A

QSOP – Q

Tape and reel

7

CY74FCT245TQCT

FCT245

SOIC

SO

Tube

7

CY74FCT245TSOC

FCT245

SOIC – SO

Tape and reel

7

CY74FCT245TSOCT

FCT245

CDIP – D

Tube

4.5

CY54FCT245CTDMB

LCC – L

Tube

4.5

CY54FCT245CTLMB

55

°Cto125°C

CDIP – D

Tube

4.9

CY54FCT245ATDMB

–55

°C to 125°C

LCC – L

Tube

4.9

CY54FCT245ATLMB

CDIP – D

Tube

7.5

CY54FCT245TDMB

LCC – L

Tube

7.5

CY54FCT245TLMB

† Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailable

at www.ti.com/sc/package.

FUNCTION TABLE

INPUTS

OPERATION

OE

T/R

OPERATION

L

L

B data to bus A

L

H

A data to bus B

H

X

Z

H = High logic level, L = Low logic level,

X = Don’t care, Z = High-impedance

state

logic diagram (positive logic)

T/R

OE

A0

B0

To Seven Other Channels

1

2

19

18