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DS42MB200 Datasheet(PDF) 3 Page - Texas Instruments

Part # DS42MB200
Description  DS42MB200 Dual 4.25 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DS42MB200 Datasheet(HTML) 3 Page - Texas Instruments

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48
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46
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VCC
SOB_0-
SOB_0+
GND
LI_0+
LI_0-
VCC
LO_1+
LO_1-
GND
2
1
35
36
PreL1
WQFN-48
Top View Shown
DAP = GND
23
38
12
PreL0
24
25
37
VCC
LO_0-
LO_0+
GND
LI_1-
LI_1+
VCC
SOB_1+
RSV
SOB_1-
PreS0
PreS1
DS42MB200
www.ti.com
SNOSAT8G – JANUARY 2006 – REVISED APRIL 2013
Connection Diagram
Figure 1. See Package Number NJU0048D
PIN DESCRIPTIONS
Pin Name
Pin Number
I/O
Description
LINE SIDE HIGH SPEED DIFFERENTIAL IO's
LI_0+
6
I
Inverting and non-inverting differential inputs of port_0 at the line side. LI_0+ and LI_0
− have an
LI_0
7
internal 50
Ω connected to an internal reference voltage. See Figure 7.
LO_0+
33
O
Inverting and non-inverting differential outputs of port_0 at the line side. LO_0+ and LO_0
− have an
LO_0
34
internal 50
Ω connected to VCC.
LI_1+
30
I
Inverting and non-inverting differential inputs of port_1 at the line side. LI_1+ and LI_1
− have an
LI_1
31
internal 50
Ω connected to an internal reference voltage. See Figure 7.
LO_1+
9
O
Inverting and non-inverting differential outputs of port_1 at the line side. LO_1+ and LO_1
− have an
LO_1
10
internal 50
Ω connected to VCC.
SWITCH SIDE HIGH SPEED DIFFERENTIAL IO's
SOA_0+
46
O
Inverting and non-inverting differential outputs of mux_0 at the switch_A side. SOA_0+ and SOA_0
SOA_0
45
have an internal 50
Ω connected to VCC.
SOB_0+
4
O
Inverting and non-inverting differential outputs of mux_0 at the switch_B side. SOB_0+ and SOB_0
SOB_0
3
have an internal 50
Ω connected to VCC.
SIA_0+
40
I
Inverting and non-inverting differential inputs to the mux_0 at the switch_A side. SIA_0+ and SIA_0
SIA_0
39
have an internal 50
Ω connected to an internal reference voltage. See Figure 7.
SIB_0+
43
I
Inverting and non-inverting differential inputs to the mux_0 at the switch_B side. SIB_0+ and SIB_0
SIB_0
42
have an internal 50
Ω connected to an internal reference voltage. See Figure 7.
SOA_1+
22
O
Inverting and non-inverting differential outputs of mux_1 at the switch_A side. SOA_1+ and SOA_1
SOA_1
21
have an internal 50
Ω connected to VCC.
SOB_1+
28
O
Inverting and non-inverting differential outputs of mux_1 at the switch_B side. SOB_1+ and SOB_1
SOB_1
27
have an internal 50
Ω connected to VCC.
Copyright © 2006–2013, Texas Instruments Incorporated
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