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BUF11705 Datasheet(PDF) 4 Page - Texas Instruments |
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BUF11705 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 31 page OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 GND D (1) BKSEL A0 SDA SCL LD 1 2 3 4 5 6 18 17 16 15 14 13 ExposedThermalPad (BottomSide) BUF12840 SBOS519A – OCTOBER 2010 – REVISED JULY 2011 www.ti.com PIN CONFIGURATION RGE PACKAGE 4mm × 4mm VQFN-24 (TOP VIEW) NOTE: (1) GNDA and GNDD must be connected together. PIN DESCRIPTIONS PIN NO. NAME DESCRIPTION 1 OUT5 DAC output 5 2 OUT4 DAC output 4 3 OUT3 DAC output 3 4 OUT2 DAC output 2 5 OUT1 DAC output 1 6 OUT0 DAC output 0 7 VS VS connected to analog supply 8 GNDA Analog ground; must be connected to digital ground (GNDD) 9 VSD Digital supply; connected to logic supply 10 EA1 EEPROM select bit 1. EA1 should be tied to logic '0' if autoread is not used. 11 EA0 EEPROM select bit 0. EA0 should be tied to logic '0' if autoread is not used. 12 EN EEPROM enable. EN must be '0' if autoread is not used. 13 LD Latch pin 14 SCL Serial clock 15 SDA Serial data 16 A0 Slave address 17 BKSEL Bank select 18 GNDD Digital ground; must be connected to digital ground (GNDA) 19 OUT11 DAC output 11 20 OUT10 DAC output 10 21 OUT9 DAC output 9 22 OUT8 DAC output 8 23 OUT7 DAC output 7 24 OUT6 DAC output 6 4 Copyright © 2010–2011, Texas Instruments Incorporated |
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