11

Write Cycle No. 1 (WE-Controlled)

1,2,3

Write Cycle No. 2 (CE-Controlled)

1,2,3,4,5

Notes:

1.

CE or WE must be high during address transition.

2.

Because I/O may be active (OE low) during this period, data input signals of opposite polarity to the

outputs must not be applied.

3.

If OE is high, the I/O pins remain in a state of high impedance.

4.

5.

SLUS057A- January 2005

bq4850Y

Not Recommended For New Designs