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DRA751 Datasheet(PDF) 1 Page - Texas Instruments |
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DRA751 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 443 page Product Folder Sample & Buy Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DRA744, DRA745, DRA746 DRA750, DRA751, DRA752 DRA754, DRA755, DRA756 SPRS950A – DECEMBER 2015 – REVISED APRIL 2016 DRA75x, DRA74x Infotainment Applications Processor Silicon Revision 2.0 1 Device Overview 1 1.1 Features 1 • Architecture Designed for Infotainment Applications • Video, Image, and Graphics Processing Support – Full-HD Video (1920 × 1080p, 60 fps) – Multiple Video Input and Video Output – 2D and 3D Graphics • ARM® Dual Cortex®-A15 Microprocessor Subsystem • Up to two C66x™ Floating-Point VLIW DSP – Fully Object-Code Compatible With C67x™ and C64x+™ – Up to Thirty-two 16 x 16-Bit Fixed-Point Multiplies per Cycle • Up to 2.5MB of On-Chip L3 RAM • Level 3 (L3) and Level 4 (L4) Interconnects • Two DDR2/DDR3/DDR3L Memory Interface (EMIF) Modules – Supports up to DDR2-800 and DDR3-1066 – Up to 2GB Supported per EMIF • Two ARM® Dual Cortex®-M4 Image Processing Units (IPUs) • Up to Two Embedded Vision Engines (EVEs) • IVA Subsystem • Display Subsystem – Display Controller With DMA Engine and up to Three Pipelines – HDMI™ Encoder: HDMI 1.4a and DVI 1.0 Compliant • Video Processing Engine (VPE) • 2D-Graphics Accelerator (BB2D) Subsystem – Vivante™ GC320 Core • Dual-Core PowerVR® SGX544™ 3D GPU • Three Video Input Port (VIP) Modules – Support for up to 10 Multiplexed Input Ports • General-Purpose Memory Controller (GPMC) • Enhanced Direct Memory Access (EDMA) Controller • 2-Port Gigabit Ethernet (GMAC) • Sixteen 32-Bit General-Purpose Timers • 32-Bit MPU Watchdog Timer • Five Inter-Integrated Circuit (I2C) Ports • HDQ™/1-Wire® Interface • SATA Interface • Media Local Bus (MLB) Subsystem • Ten Configurable UART/IrDA/CIR Modules • Four Multichannel Serial Peripheral Interfaces (MCSPIs) • Quad SPI (QSPI) • Multichannel Audio Serial Port (MCASP) • SuperSpeed USB 3.0 Dual-Role Device • PCI-Express® 2.0 Subsystems With Two 5-Gbps Lanes – One 2-lane Gen2-Compliant Port – or Two 1-lane Gen2-Compliant Ports • Dual Controller Area Network (DCAN) Modules – CAN 2.0B Protocol • Up to 247 General-Purpose I/O (GPIO) Pins • Real-Time Clock Subsystem (RTCSS) • Devise security features – Hardware Crypto accelerators and DMA – Firewalls – JTAG lock – Secure keys – Secure ROM and boot • Power, Reset, and Clock Management • On-Chip Debug With CTools Technology • 28-nm CMOS Technology • 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABC) |
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