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DS110DF410 Datasheet(PDF) 1 Page - Texas Instruments |
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DS110DF410 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 61 page  Line Card Switch Fabric ASIC Back Plane/ Mid Plane Optical Modules DS110DF410 Passive Copper ASIC x4 x4 x4 x4 Noisy Signal Clean Signal DS110DF410 10GbE Fibre Channel InfiniBand SONET Others SFP+ (SFF8431) Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS110DF410 SNLS397D – OCTOBER 2011 – REVISED APRIL 2015 DS110DF410 Low Power Multi-Rate Quad Channel Retimer 1 Features 2 Applications 1 • Each Channel Independently Locks to Data Rates • Front Port SFF 8431 (SFP+) Optical and Direct from 8.5 to 11.3 Gbps and Sub-rates Attach Copper • Support for Subrates of Divide by 2/4/8 • Backplane Reach Extension, Data Retimer • Fast Lock Operation Based on Protocol-Select • Ethernet: 10GbE, 1GbE Mode • Fibre-Channel, InfiniBand • Low Latency (~300ps) • Other Propriety Data Rates up to 11.3 Gbps • Adaptive Equalization up to 34-dB Boost at 5 GHz 3 Description • Adjustable Transmit VOD: 600 to 1300 mVp-p The DS110DF410 is a four channel retimer with • Adjustable Transmit De-emphasis to –12 dB integrated signal conditioning. The device includes a • Typical Power Dissipation (EQ+DFE+CDR+DE): fully adaptive Continuous-Time Linear Equalizer 180 mW/Channel (CTLE), self calibrating 5-tap Decision Feedback • Programmable Output Polarity Inversion Equalizer (DFE), Clock and Data Recovery (CDR), and transmit De-Emphasis (DE) driver to enable data • Input Signal Detection, CDR Lock transmission over long, lossy and crosstalk-impaired Detection/Indicator highspeed serial links to achieve BER < 1×10-15. • On-Chip Eye Monitor (EOM), PRBS Generator Each channel can independently lock to data rates • Single 2.5-V ±5% Power Supply from 8.5 to 11.3 Gbps, and associated sub rates (div • SMBus/EEPROM Configuration Modes by 2, 4 and 8) to support a variety of communication • Operating Temperature Range of –40 to 85°C protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not • WQFN 48-Pin 7-mm × 7-mm Package used for training the PLL and does not need to be • Easy Pin Compatible Upgrade Between Repeater synchronous with the serial data. and Retimers The programmable settings can be applied using the – DS100RT410 (EQ+CDR+DE): 10.3125 Gbps SMBus (I2C) interface, or they can be loaded via an – DS100DF410 (EQ+DFE+CDR+DE): 10.3125 external EEPROM. An on-chip eye monitor and a Gbps PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field – DS110RT410 (EQ+CDR+DE): 8.5 - 11.3 Gbps tuning. – DS110DF410 (EQ+DFE+CDR+DE): 8.5 - 11.3 Gbps Device Information(1) – DS125RT410 (EQ+CDR+DE): 9.8 - 12.5 Gbps PART NUMBER PACKAGE BODY SIZE (NOM) – DS125DF410 (EQ+DFE+CDR+DE): 9.8 - 12.5 DS110DF410 WQFN (48) 7.00 mm x 7.00 mm Gbps (1) For all available packages, see the orderable addendum at – DS100BR410 (EQ+DE): Up to 10.3125 Gbps the end of the datasheet. 4 Typical Application Diagram 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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