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A8904 Datasheet(PDF) 10 Page - Allegro MicroSystems |
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A8904 Datasheet(HTML) 10 Page - Allegro MicroSystems |
10 / 18 page 8904 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 10 unbalance in the commutation points. It is recommended to select the value of C WD in the actual application circuit with the A8904 put into step mode. C ST should be reselected (only for this test), to be between 4.7 µF and 10 µF, so that the motor comes to rest between steps and the maximum diode conduction time can be measured. The value of C WD can be determined as: C WD = ICWD x td / VTL where t d = measured diode conduction, ICWD = charge current at start-up, and V TL = 250 mV. t BLANK Dwg. W P-022 BLANK CWD V V TL t BLANK t WD V TL V TH Dwg. W P-021 BLANK CWD V After the watchdog capacitor C WD charges to the VTL threshold, and if the correct polarity of back-EMF signal is detected, the back-EMF detection circuit discharges C WD to zero volts (see waveform above) and the circuit is ready to detect the next back- EMF zero crossing. If the correct polarity of back-EMF is not detected between the blanking period, t BLANK, and the watchdog period, tWD, then the back-EMF detection circuit does not allow the watchdog capacitor C WD to be discharged and the watchdog circuit commutates the outputs to the next sequencer state (see wave- form above). This mode of operation continues until a suitable back-EMF signal is detected. This function is useful in prevent- ing excessive reverse rotation, and helps in resynchronising (or starting) with a moving spindle. The duration of the watchdog-triggered commutation is determined by: t WD = VTH x CWD / ICWD where I CWD = normal charge current. Speed control. The actual speed of the motor is mea- sured by either internally sensing the back-EMFs or by an external scheme via the SECTOR DATA terminal. A TACH signal is produced from these signals, which is then compared against the desired speed, which is programmed into a 14-bit counter (see diagram and waveforms below - assumes internal scheme used). The resulting error signal, ERROR, is then used to charge or discharge the FILTER terminal capacitor depending on whether the motor is running too slow or too fast. The FILTER terminal voltage is used to linearly drive the low-side MOSFETs to match the desired speed. Each back-EMF signal detected causes the state of the FCOM signal to change. The number of FCOM transitions per mechanical revolution is equal to the number of poles times 3. For example, with a 4-pole motor (as shown on next page), the number of FCOM transitions will equal 12 per mechanical revolution. The number of poles are programmed via serial port bits D20 and D21. There are six electrical states per electrical revolution, therefore, for this example, there are 12 commuta- tions or two electrical revolutions per mechanical revolution. The TACH signal changes state once per mechanical revolution and as well as providing information on the actual motor speed is also used to trigger the REF counter which contains the information on the desired motor speed. Alterna- tively an external TACH signal can be used, an explanation of which is presented in the Sector Mode Section. The duration of REF is set by programming the counter to count the desired number of OSCILLATOR cycles, according to the following: total count = 60 x f OSC / desired motor speed (rpm) where the total count (number of oscillator cycles) is equal to the sum of the count numbers selected through bits D5 to D18 in the serial port and f OSC corresponds to the OSCILLATOR fre- quency. Functional Description (cont’d) Normal commutation Watchdog-triggered commutation |
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