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CDC509 Datasheet(PDF) 5 Page - Texas Instruments |
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CDC509 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 13 page CDC509 3.3V PHASELOCK LOOP CLOCK DRIVER SCAS576C − JULY 1996 − REVISED DECEMBER 2004 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 30 pF (see Note 5 and Figures 1 and 2)† PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 3.3 V ± 0.165 V VCC = 3.3 V ± 0.3 V UNIT PARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN TYP MAX UNIT tphase error, reference (see Figure 3) 66 MHz < CLKIN ↑ < 100 MHz FBIN ↑ 100...480 ps tphase error, − jitter, (see Note 6) CLKIN ↑ = 100 MHz FBIN ↑ 220 480 340 ps tsk(o)‡ Any Y or FBOUT Any Y or FBOUT 200 ps Jitter(pk-pk) F(clkin > 66 MHz) Any Y or FBOUT −100 100 ps Duty cycle, reference F(clkin ≤ 66 MHz) Any Y or FBOUT 45% 55% Duty cycle, reference (see Figure 4) F(clkin > 66 MHz) Any Y or FBOUT 43% 57% tr Any Y or FBOUT 1.1 1.5 0.7 1.6 ns tf Any Y or FBOUT 0.8 1.3 0.5 1.5 ns † This parameters are not production tested. ‡ The tsk(o) specification is only valid for equal loading of all outputs. NOTES: 5. The specifications for parameters in this table are applicable only after any appropriate stabilization time has elapsed. 6. Phase error does not include jitter. The total phase error is 120 ps to 580 ps for the 5% VCC range. PARAMETER MEASUREMENT INFORMATION From Output Under Test LOAD CIRCUIT FOR OUTPUTS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES tpd 50% VCC 3 V 0 V VOH VOL Input 0.4 V 2 V tr tf 0.4 V 2 V Output 500 W 50% VCC 30 pF NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 100 MHz, ZO = 50 Ω, tr ≤ 1.2 ns, tf ≤ 1.2 ns. C. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms |
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