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DAC8228SPAGR Datasheet(PDF) 1 Page - Texas Instruments |
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DAC8228SPAGR Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 55 page  DAC8228 DAC8228 An og al Monit r o ToDAC-0,DAC-1, DAC-2,DAC-3 ToDAC-0,DAC-1, DAC-2,DAC-3 ToDAC-4,DAC-5,DAC-6,DAC-7 DAC8228 OFFSET-B AGND-B V OUT-7 V MON OFFSET-A AGND-A REF-B Reference BufferB InternalTrimming Zero/Gain;INL Reference BufferA OFFSET DACA OFFSET DACB DAC-0 Latch-0 Power-Up/ Power-Down Control (SameFunctionBlocks forAllChannels) REF-A LDAC RST RSTSEL LDAC CLR USB/BTC BUSY GPIO D13 D0 CS R/W IOV DD DGND DV DD AV DD AV SS V -0 OUT V -7 OUT RefBufferA RefBufferB OFFSET-B Command Registers InputData Register0 Correction Engine (WhenCorrectionEngineDisabled) DAC-0 Data UserCalibration: ZeroRegister0 GainRegsiter0 V -0 OUT A4 A0 DAC8228 www.ti.com SBAS462A – JUNE 2009 – REVISED NOVEMBER 2009 Octal, 14-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER Check for Samples: DAC8228 1 FEATURES DESCRIPTION 2 • Bipolar Output: ±3V, up to ±16.5V The DAC8228 is a low-power, octal, 14-bit digital-to-analog converter (DAC). With a 5V • Unipolar Output: 0V to +33V reference, the output can either be a bipolar ±15V • 14-Bit Resolution voltage when operating from a dual ±15.5V (or • Low Power: 13.5mW/Ch higher) power supply, or a unipolar 0V to +30V • Relative Accuracy: 1LSB Max voltage when operating from a +30.5V power supply. With a 5.5V reference, the output can be ±16.5V for a • Flexible User Calibration dual ±17V (or higher) power supply, or a unipolar 0V • Low Zero/Full-Scale Error to +33V voltage when operating from a +33.5V (or – Before User Calibration: ±2.5 LSB Max higher) power supply. This DAC provides low-power operation, good linearity, and low glitch over the – After User Calibration: ±1 LSB specified temperature range of –40°C to +105°C. This • Low Glitch: 4nV-s device is trimmed in manufacturing and has very low • Settling Time: 15 μs zero and full-scale error. In addition, user calibration can be performed to achieve ±1 LSB bipolar • Channel Monitor Output zero/full-scale error for a bipolar supply, or ±1 LSB • Programmable Gain: x4, x6 zero-code/full-scale error for a unipolar supply over • Programmable Offset the entire signal chain. The output range can be offset by using the DAC Offset Register. • 14-Bit Parallel Interface: 50MHz (Write Operation) The DAC8228 features a standard, high-speed, 14-bit • Packages: QFN-56 (8mm x 8mm), parallel interface that operates at up to 50MHz and is 1.8V, 3V, and 5V logic compatible, to communicate TQFP-64 (10mm x 10mm) with a DSP or microprocessor. The eight DACs and the auxiliary registers are addressed with five address APPLICATIONS lines. The device features double-buffered interface • Automatic Test Equipment logic. An asynchronous load input (LDAC) transfers • PLC and Industrial Process Control data from the DAC data register to the DAC latch. • Communications The asynchronous CLR input sets the output of all eight DACs to AGND. The VMON pin is a monitor output that connects to the individual analog outputs, the offset DAC, and the reference buffer outputs through a multiplexer (mux). The DAC8228 is pin-to-pin compatible with the DAC8728 (16-bit) and the DAC7728 (12-bit). 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2009, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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