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DP83846 Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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DP83846 Datasheet(HTML) 7 Page - National Semiconductor (TI) |
7 / 59 page 7 www.national.com 1.3 Clock Interface 1.4 Special Connections 1.5 LED Interface Signal Name Type Pin # Description X1 I 67 REFERENCE CLOCK INPUT 25 MHz: This pin is the pri- mary clock reference input for the DP83846A and must be connected to a 25 MHz 0.005% ( ±50 ppm) clock source. The DP83846A supports CMOS-level oscillator sources. X2 O 66 REFERENCE CLOCK OUTPUT 25 MHz: This pin is the primary clock reference output. Signal Name Type Pin # Description RBIAS I 3 Bias Resistor Connection. A 9.31 k Ω1% resistor should be connected from RBIAS to ANA_GND. RESERVED I/O 1, 5, 8, 20, 21, 22, 47, 63, 68, 69, 70, 71, 74, 75, 77, 78, 80 RESERVED: These pins must be left unconnected. Signal Name Type Pin # Description LED_DPLX/PHYAD0 S, O 33 FULL DUPLEX LED STATUS: Indicates Full-Duplex sta- tus. LED_COL/PHYAD1 S, O 32 COLLISION LED STATUS: Indicates Collision activity in Half Duplex mode. LED_GDLNK/PHYAD2 S, O 31 GOOD LINK LED STATUS: Indicates Good Link Status for 10BASE-T and 100BASE-TX. LED_TX/PHYAD3 S, O 30 TRANSMIT LED STATUS: Indicates transmit activity. LED is on for activity, off for no activity. LED_RX/PHYAD4 S, O 29 RECEIVE LED STATUS: Indicates receive activity. LED is on for activity, off for no activity. LED_SPEED O 28 SPEED LED STATUS: Indicates link speed; high for 100 Mb/s, low for 10 Mb/s. |
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