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SN74ALVCHR16269A Datasheet(PDF) 2 Page - Texas Instruments |
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SN74ALVCHR16269A Datasheet(HTML) 2 Page - Texas Instruments |
2 / 11 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) FUNCTION TABLES SN74ALVCHR16269A 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES050O – AUGUST 1995 – REVISED SEPTEMBER 2004 To ensure the high-impedance state during power up or power down, a clock pulse should be applied as soon as possible, and OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE being routed through a register, the active state of the outputs cannot be determined prior to the arrival of the first clock pulse. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. All outputs are designed to sink up to 12 mA and include equivalent 26- Ω resistors to reduce overshoot and undershoot. OUTPUT ENABLE INPUTS OUTPUTS CLK OEA OEB A 1B, 2B ↑ H H Z Z ↑ H L Z Active ↑ L H Active Z ↑ L L Active Active A-TO-B STORAGE (OEB = L) INPUTS OUTPUTS CLKENA1 CLKENA2 CLK A 1B 2B L H ↑ L L 2B0 (1) L H ↑ H H 2B0 (1) L L ↑ L L L L L ↑ H H H H L ↑ L 1B0 (1) L H L ↑ H 1B0 (1) H H H X X 1B0 (1) 2B0 (1) (1) Output level before the indicated steady-state input conditions were established B-TO-A STORAGE (OEA = L) INPUTS OUTPUT A CLK SEL 1B 2B X H X X A0 (1) X L X X A0 (1) ↑ H L X L ↑ H H X H ↑ L X L L ↑ L X H H (1) Output level before the indicated steady-state input conditions were established 2 |
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