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BQ24261MRGER Datasheet(PDF) 10 Page - Texas Instruments |
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BQ24261MRGER Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 57 page  Not Recommended for New Designs : bq24260, bq24261 bq24260, bq24261, bq24261M, bq24262 SLUSBU4E – DECEMBER 2013 – REVISED DECEMBER 2015 www.ti.com Electrical Characteristics (continued) Circuit of Figure 7, VUVLO < VIN < VOVP AND VIN > VBAT+ VSLP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT % of VBOVP_HYS VBOVP hysteresis Lower limit for VBAT falling from above VBOVP 1 VBATREG tDGL(BOVP) BOVP Deglitch Battery entering/exiting BOVP 8 ms ICbCLIMIT Cycle-by-cycle current limit VSYS shorted 4.1 4.5 4.9 A TSHTDWN Thermal trip 150 °C Thermal hysteresis 10 °C TREG Thermal regulation threshold Input current begins to cut off 125 °C Safety Timer Accuracy –20% 20% PWM YFF Package: Measured from IN to SW 75 120 m Ω Internal top MOSFET ON- RDSON_Q1 resistance RGE Package: Measured from IN to SW 80 135 m Ω YFF Package: Measured from SW to PGND 75 115 m Ω Internal bottom N-channel RDSON_Q2 MOSFET ON-resistance RGE Package: Measured from SW to PGND 80 135 m Ω fOSC Oscillator frequency 1.35 1.5 1.65 MHz DMAX Maximum duty cycle 95% — DMIN Minimum duty cycle 0% BATTERY-PACK NTC MONITOR (1) VHOT High temperature threshold VTS falling, 2% VDRV Hysteresis 27.3 30 32.6 %VDRV VWARM Warm temperature threshold VTS falling, 2% VDRV Hysteresis 36.0 38.3 41.2 %VDRV VCOOL Cool temperature threshold VTS rising, 2% VDRV Hysteresis 54.7 56.4 58.1 %VDRV VCOLD Low temperature threshold VTS rising, 2% VDRV Hysteresis 58.2 60 61.8 %VDRV TSOFF TS Disable threshold VTS rising, 4% VDRV Hysteresis 80 85 %VDRV tDGL(TS) Deglitch time on TS change Applies to VHOT, VWARM, VCOOL and VCOLD 50 ms I2C-COMPATIBLE INTERFACE VIH Input low threshold level VPULL-UP=1.8 V, SDA and SCL 1.3 V VIL Input low threshold level VPULL-UP=1.8 V, SDA and SCL 0.4 V VOL Output low threshold level IL=5 mA, sink current 0.4 V IBIAS High-Level leakage current VPULL-UP=1.8 V, SDA and SCL 1 μA tWATCHDOG 30 50 s tI2CRESET 700 ms OTG BOOST SUPPLY Quiescent current during IQBAT_ BOOST 3.3 V < VBAT < 4.5 V, no switching 100 µA boost mode (BAT pin) Battery voltage range for VBAT falling 3.3 4.5 V specified boost operation Boost output voltage (to pin VIN_BOOST 3.3 V < VBAT < 4.5 V over line and load 4.95 5.05 5.2 V VBUS) BOOST_ILIM = 1 1000 Maximum output current for IBO 3.3 V < VBAT < 4.5 V mA boost BOOST_ILIM = 0 500 Cycle by cycle current limit for BOOST_ILIM = 1 4 IBLIMIT boost (measured at low-side 3.3 V < VBAT < 4.5 V A BOOST_ILIM = 0 2 FET) Overvoltage protection VBOOSTOVP Signals fault and exits boost mode 5.8 6 6.2 V threshold for boost (IN pin) Deglitch Time, VIN OVP in tDGL(BOOST_OVP) 170 µs Boost Mode Upper VIN voltage threshold to VBURST(ENT) enter burst mode (stop 5.1 5.2 5.3 V switching) Lower VBUS voltage threshold VBURST(EXIT) to exit burst mode (start 4.9 5 5.1 V switching) 10 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated Product Folder Links: bq24260 bq24261 bq24261M bq24262 |
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