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BQ2050H Datasheet(PDF) 4 Page - Texas Instruments |
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BQ2050H Datasheet(HTML) 4 Page - Texas Instruments |
4 / 30 page Voltage Thresholds In conjunction with monitoring VSR for charge/discharge currents, the bq2050H monitors the battery potential through the SB pin. The voltage is determined through a resistor-divider network per the following equation: RB1 RB2 4N =− 1 where N is the number of cells, RB1 is connected to the positive battery terminal, and RB2 is connected to the negative battery terminal. The single-cell battery volt- age is monitored for the end-of-discharge voltage (EDV) thresholds. The EDV threshold levels are used to deter- mine when the battery has reached an “empty” state. The EDV thresholds for the bq2050H are programmable with the default values fixed at: EDV1 (first) = 0.76V EDVF (final) = EDV1-0.025V = 0.735V If VSB is below either of the two EDV thresholds, the as- sociated flag is latched and remains latched, independ- ent of VSB, until the next valid charge. The VSB value is also available over the serial port. During discharge and charge, the bq2050H monitors VSR for various thresholds used to compensate the charge counter. EDV monitoring is disabled if the dis- charge rate is greater than 2C (OVLD Flag = 1) and re- sumes 1 2 second after the rate falls below 2C. RBI Input The RBI input pin is intended to be used with a storage capacitor or external supply to provide backup potential to the internal bq2050H registers when VCC drops below 3.0V. VCC is output on RBI when VCC is above 3.0V. If us- ing an external supply (such as the bottom series cell) as the backup source, an external diode is required for isola- tion. Reset The bq2050H can be reset by removing VCC and ground- ing the RBI pin for 15 seconds or by commands over the serial port. The serial port reset command sequence re- quires writing 00h to register PPFC (address = 1Eh) and then writing 00h to register LMD (address = 05h). Temperature The bq2050H internally determines the temperature in 10°C steps centered from approximately -35°C to +85°C. The temperature steps are used to adapt charge and dis- charge rate compensations, self-discharge counting, and available charge display translation. The temperature range is available over the serial port in 10°C incre- ments as shown in the following table: Layout Considerations The bq2050H measures the voltage differential between the SR and VSS pins. VOS (the offset voltage at the SR pin) is greatly affected by PC board layout. For optimal results, the PC board layout should follow the strict rule of a single-point ground return. Sharing high-current ground with small signal ground causes undesirable noise on the small signal nodes. Additionally: I The capacitors (C1 and C2) should be placed as close as possible to the VCC and SB pins, respectively, and their paths to VSS should be as short as possible. A high-quality ceramic capacitor of 0.1 µF is recommended for VCC. I The sense-resistor capacitor should be placed as close as possible to the SR pin. I The sense resistor (RS) should be as close as possible to the bq2050H. 4 bq2050H TMP (hex) Temperature Range 0x < -30°C 1x -30°C to -20°C 2x -20°C to -10°C 3x -10°C to 0°C 4x 0°C to 10°C 5x 10°C to 20°C 6x 20°C to 30°C 7x 30°C to 40°C 8x 40°C to 50°C 9x 50°C to 60°C Ax 60°C to 70°C Bx 70°C to 80°C Cx > 80°C Not Recommended For New Designs |
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