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BQ2004ESNTR Datasheet(PDF) 5 Page - Texas Instruments

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Part # BQ2004ESNTR
Description  Fast-Charge ICs
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

BQ2004ESNTR Datasheet(HTML) 5 Page - Texas Instruments

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5
VSEL Input
Voltage Termination
Low
Disabled
Float
-
∆V
High
PVD
Voltage Sampling
Each sample is an average of voltage measurements.
The IC takes 32 measurements in PVD mode and 16
measurements in -
∆V mode. The resulting sample peri-
ods (9.17ms and 18.18ms, respectively) filter out har-
monics centered around 55Hz and 109Hz. This tech-
nique minimizes the effect of any AC line ripple that
may feed through the power supply from either 50Hz or
60Hz AC sources. Tolerance on all timing is
±16%.
Temperature and Voltag e Termination
Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off period, -
∆V and ∆T/∆t termination
are disabled. The MOD pin is enabled at a duty cycle of
260
µs active for every 1820µs inactive. This modulation
results in an average rate 1/8th that of the fast charge
rate. This avoids premature termination on the voltage
spikes sometimes produced by older batteries when
fast-charge current is first applied. Maximum voltage
and maximum temperature terminations are not af-
fected by the hold-off period.
∆T/∆t Termination
The bq2004E/H samples at the voltage at the TS pin
every 34s, and compares it to the value measured two
samples earlier. If VTEMP has fallen 16mV
±4mV or
more, fast charge is terminated. The
∆T/∆t termination
test is valid only when VTCO <VTEMP <VLTF.
Temperature Sampling
Each sample is an average of 16 voltage measurements.
The resulting sample period (18.18ms) filters out har-
monics around 55Hz. This technique minimizes the ef-
fect of any AC line ripple that may feed through the
power supply from either 50Hz or 60Hz AC sources. Tol-
erance on all timing is
±16%.
Maximum Voltage, Temperature, and Time
Anytime VCELL rises above VMCV, the LEDs go off and cur-
rent flow into the battery ceases immediately. If VCELL
then falls back below VMCV before tMCV = 1.5s
±0.5s, the
chip transitions to the Charge Complete state (maximum
voltage termination). If VCELL remains above VMCV at the
expiration of tMCV, the bq2004E/H transitions to the Bat-
tery Absent state (battery removal). See Figure 3.
Maximum temperature termination occurs anytime
VTEMP falls below the temperature cutoff threshold
VTCO. Charge will also be terminated if VTEMP rises
above the low temperature fault threshold, VLTF, after
fast charge begins.
Corresponding
Fast-Charge
Rate
TM1
TM2
Typical
Fast-Charge
Safety
Time (min)
Typical
PVD, -
∆V
Hold-Off
Time (s)
Top-Off
Rate
Pulse-
Trickle
Rate
Pulse-
Trickle
Period (Hz)
2004E
2004H
2004E
2004H
2004E
2004H
2004E
2004H
2004E
2004H
C/4
C/8
Low
Low
325
650
137
273
Disabled
Disabled
Disabled
C/2
C/4
Float
Low
154
325
546
546
Disabled
C/512
15
30
1C
C/2
High
Low
77
154
273
546
Disabled
C/512
7.5
15
2C
1C
Low
Float
39
77
137
273
Disabled
C/512
3.75
7.5
4C
2C
Float
Float
19
39
68
137
Disabled
C/512
1.88
3.75
C/2
C/4
High
Float
154
325
546
546
C/16
C/32
C/512
15
30
1C
C/2
Low
High
77
154
273
546
C/8
C/16
C/512
7.5
15
2C
1C
Float
High
39
77
137
273
C/4
C/18
C/512
3.75
7.5
4C
2C
High
High
19
39
68
137
C/2
C/4
C/512
1.88
3.75
Note: Typical conditions = 25°C, VCC = 5.0V.
Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table
bq2004E/H


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