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BQ2010 Datasheet(PDF) 11 Page - Texas Instruments |
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BQ2010 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 26 page The W/R values are: Where W/R is: 0 The bq2010 outputs the requested register contents specified by the address portion of CMDR. 1 The following eight bits should be written to the register specified by the address por- tion of CMDR. The lower seven-bit field of CMDR contains the address portion of the register to be accessed. Attempts to write to invalid addresses are ignored. Primary Status Flags Register (FLGS1) The read-only FLGS1 register (address=01h) contains the primary bq2010 flags. The charge status flag (CHGS) is asserted when a valid charge rate is detected. Charge rate is deemed valid when VSRO >VSRQ.A VSRO of less than VSRQ or discharge activity clears CHGS. The CHGS values are: Where CHGS is: 0 Either discharge activity detected or VSRO < VSRQ 1VSRO > VSRQ The battery replaced flag (BRP) is asserted whenever the potential on the SB pin (relative to VSS), VSB, falls from above the maximum cell voltage, MCV (2.25V), or rises above 0.1V. The BRP flag is also set when the bq2010 is reset (see the RST register description). BRP is reset when either a valid charge action increments NAC to be equal to LMD, or a valid charge action is de- tected after the EDV1 flag is asserted. BRP = 1 signifies that the device has been reset. The BRP values are: Where BRP is: 0 Battery is charged until NAC = LMD or dis- charged until the EDV1 flag is asserted 1VSB dropping from above MCV, VSB rising from below 0.1V, or a serial port initiated reset has occurred The battery removed flag (BRM) is asserted whenever the potential on the SB pin (relative to VSS) rises above MCV or falls below 0.1V. The BRM flag is asserted until the condition causing BRM is removed. The BRM values are: Where BRM is: 0 0.1V < VSB < 2.25V 1 0.1 V > VSB or VSB > 2.25V The capacity inaccurate flag (CI) is used to warn the user that the battery has been charged a substantial number of times since LMD has been updated. The CI flag is asserted on the 64th charge after the last LMD update or when the bq2010 is reset. The flag is cleared after an LMD update. The CI values are: Where CI is: 0 When LMD is updated with a valid full dis- charge 1 After the 64th valid charge action with no LMD updates or the bq2010 is reset 11 FLGS1 Bits 76 5 4 3 2 1 0 - - BRM - - - - - FLGS1 Bits 76 5 4 3 2 1 0 CHGS - -- - - - - FLGS1 Bits 76 5 4 3 2 1 0 - BRP - - - - - - CMDR Bits 76 5 4 3 2 1 0 - AD6 AD5 AD4 AD3 AD2 AD1 AD0 (LSB) CMDR Bits 76 5 4 3 2 1 0 W/R - -- - - - - FLGS1 Bits 76 5 4 3 2 1 0 -- - CI - - - - bq2010 Not Recommended For New Designs |
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