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TPS54620RHLT Datasheet(PDF) 4 Page - Texas Instruments |
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TPS54620RHLT Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 46 page  13 BOOT 12 PH 11 PH 10 EN 9 SS/TR GND 2 GND 3 PVIN 4 PVIN 5 VIN 6 7 8 1 14 RT/CLK PWRGD VSENSE COMP (15) Exposed Thermal Pad 4 TPS54620 SLVS949E – MAY 2009 – REVISED JULY 2016 www.ti.com Product Folder Links: TPS54620 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated (1) I = input, O = output, G = GND, P = Power 6 Pin Configurations and Functions RHL and RGY PACKAGE (TOP VIEW) Pin Functions PIN I/O(1) DESCRIPTION NAME NO. RT/CLK 1 I Automatically selects between RT mode and CLK mode. An external timing resistor adjusts the switching frequency of the device; In CLK mode, the device synchronizes to an external clock. GND 2, 3 G Return for control circuitry and low-side power MOSFET. PVIN 4, 5 P Power input. Supplies the power switches of the power converter. VIN 6 P Supplies the control circuitry of the power converter. VSENSE 7 I Inverting input of the gm error amplifier. COMP 8 O Error amplifier output, and input to the output switch current comparator. Connect frequency compensation to this pin. SS/TR 9 O Slow-start and tracking. An external capacitor connected to this pin sets the internal voltage reference rise time. The voltage on this pin overrides the internal reference. It can be used for tracking and sequencing. EN 10 I Enable pin. Float to enable. Adjust the input undervoltage lockout with two resistors. PH 11, 12 O The switch node. BOOT 13 I A bootstrap cap is required between BOOT and PH. The voltage on this cap carries the gate drive voltage for the high-side MOSFET. PWRGD 14 G Power Good fault pin. Asserts low if output voltage is low due to thermal shutdown, dropout, over- voltage, EN shutdown or during slow start. Exposed Thermal PAD 15 G Thermal pad of the package and signal ground and it must be soldered down for proper operation. |
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