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ADC08D1000QML Datasheet(PDF) 10 Page - Texas Instruments |
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ADC08D1000QML Datasheet(HTML) 10 Page - Texas Instruments |
10 / 50 page ADC08D1000QML, ADC08D1000QML-SP ADC08D1000WG-QV SNAS352G – JANUARY 2007 – REVISED MARCH 2013 www.ti.com ADC08D1000 Converter Electrical Characteristics DC Parameters (continued) The following specifications apply after calibration for VA = VDR = +1.9VDC, OutV = 1.9V, VIN FSR (a.c. coupled) = differential 870mVP-P, CL = 10 pF, Differential, a.c. coupled Sinewave Input Clock, fCLK = 1 GHz at 0.5VP-P with 50% duty cycle, VBG = Floating, Non-Extended Control Mode, SDR Mode, REXT = 3300Ω ±0.1%, Analog Signal Source Impedance = 100Ω Differential. Boldface limits apply for TA = TMIN to TMAX (1)(2) Sub- Parameter Test Conditions Notes Typ(3) Min Max Units groups Measured differentially, See(5) 710 400 920 mVP-P 1, 2, 3 OutV = VA, VBG = Floating LVDS Differential Output VOD Voltage Measured differentially, See(5) 510 280 720 mVP-P 1, 2, 3 OutV = GND, VBG = Floating POWER SUPPLY CHARACTERISTICS PD = PDQ = Low 660 765 mA 1, 2, 3 IA Analog Supply Current PD = Low, PDQ = High 430 508 mA 1, 2, 3 PD = PDQ = High 1.8 mA PD = PDQ = Low 200 275 mA 1, 2, 3 Output Driver Supply IDR PD = Low, PDQ = High 112 157 mA 1, 2, 3 Current PD = PDQ = High 0.012 mA PD = PDQ = Low 1.6 1.97 W 1, 2, 3 PD Power Consumption PD = Low, PDQ = High 1.0 1.27 W 1, 2, 3 PD = PDQ = High 3.5 mW (5) Tying VBG to the supply rail will increase the output offset voltage (VOS) by 330mv (typical), as shown in the VOS specification above. Tying VBG to the supply rail will also affect the differential LVDS output voltage (VOD), causing it to increase by 40mV (typical). 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: ADC08D1000QML ADC08D1000QML-SP ADC08D1000WG-QV |
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