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ADC128S102CIMT Datasheet(PDF) 3 Page - Texas Instruments

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Part # ADC128S102CIMT
Description  12-Bit A/D Converter
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC128S102CIMT Datasheet(HTML) 3 Page - Texas Instruments

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3
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5
6
7
8
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10
11
12
13
14
15
16
CS
SCLK
V
A
DOUT
AGND
DIN
IN0
V
D
IN1
DGND
IN2
IN7
IN3
IN6
IN4
IN5
ADC128S102
ADC128S102
www.ti.com
SNAS298G – AUGUST 2005 – REVISED JANUARY 2015
5 Pin Configuration and Functions
PW Package
16-Pin TSSOP
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
3
AGND
Supply
The ground return for the analog supply and signals.
Chip select. On the falling edge of CS, a conversion process begins. Conversions continue as long
1
CS
IN
as CS is held low.
12
DGND
Supply
The ground return for the digital supply and signals.
Digital data input. The ADC128S102's Control Register is loaded through this pin on rising edges of
14
DIN
IN
the SCLK pin.
Digital data output. The output samples are clocked out of this pin on the falling edges of the SCLK
15
DOUT
OUT
pin.
4 - 11
IN0 to IN7
IN
Analog inputs. These signals can range from 0 V to VREF.
Digital clock input. The ensured performance range of frequencies for this input is 8 MHz to 16 MHz.
16
SCLK
IN
This clock directly controls the conversion and readout processes.
Positive analog supply pin. This voltage is also used as the reference voltage. This pin should be
2
VA
Supply
connected to a quiet +2.7-V to +5.25-V source and bypassed to GND with 1-µF and 0.1-µF
monolithic ceramic capacitors located within 1 cm of the power pin.
Positive digital supply pin. This pin should be connected to a +2.7 V to VA supply, and bypassed to
13
VD
Supply
GND with a 0.1-µF monolithic ceramic capacitor located within 1 cm of the power pin.
Copyright © 2005–2015, Texas Instruments Incorporated
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