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CR16MNS544VI Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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CR16MNS544VI Datasheet(HTML) 3 Page - National Semiconductor (TI) |
3 / 99 page 3 www.national.com 1.0 General Description (Continued) In the following text, device is alsays refered to the family of CompactRISC 16-bit microcontrollers. For the exact feature set, check individual datasheets. The device is available in a variety of package sizes and types. All devices have 48 kbytes of reprogrammable flash program memory, 1.5 kbytes of ISP memory, 2 kbytes of stat- ic RAM, and 640 bytes of non-volatile EEPROM data memo- ry. The 80-pin device has two USARTs, two 16-bit multi- function timers, one SPI/MICROWIRE-PLUS™ serial inter- face, an 8-channel A/D converter, two analog comparators, WATCHDOG™ protection mechanism, and up to 48 general- purpose I/O pins. The 44-pin devices offer the same basic features as the 80-pin device, but with fewer I/O ports and peripheral modules due to the smaller number of available pins. All devices operate with a high-frequency crystal as the main clock source. Some packages allow the device to operate with either the main clock source or with a slow (32.768 KHz) oscillator in Power Save mode. The device supports several Power Save modes which are combined with multi-source in- terrupt and wake-up capabilities. Powerful cross-development tools are available from Nation- al Semiconductor and third party suppliers to support the de- velopment and debugging of application software for the device. These tools let you program the application software in C and are designed to take full advantage of the Compac- tRISC architecture. 2.0 Features • CPU Features — Fully static core, capable of operating at any rate from 0 to 20 MHz (4 MHz minimum in active mode) — 50 ns instruction cycle time with a 20 MHz external clock frequency — Multi-source vectored interrupts (internal, external, and on-chip peripheral) — On-chip power-on reset • On-Chip Memory — 48 kbytes of flash program memory or ROM memory (100K cycle) — 1.5 kbytes of ISP memory (100K cycle) — 2 kbytes of static RAM data memory — 640 bytes of non-volatile EEPROM data memory, word-programmable (100K cycle) • On-Chip Peripherals — Up to two Universal Synchronous/Asynchronous Re- ceiver/Transmitter (USART) devices — Programmable Idle Timer and real-time clock (T0) — Up to two dual 16-bit multi-function timers (MFT1 and MFT2) — SPI/MICROWIRE-PLUS serial interface — 8-channel, 8-bit Analog-to-Digital (A/D) converter with external voltage reference, programmable sample- and-hold delay, and programmable conversion fre- quency — Up to two analog comparators — Integrated WATCHDOG logic • I/O Features — Up to 48 general-purpose I/O pins (shared with on-chip peripheral I/O pins) — Programmable I/O pin characteristics: TRI-STATE out- put, push-pull output, weak pull-up input, high-imped- ance input — Software-configurable Schmitt triggers on inputs • Power Supply — 4.5V to 5.5V single-supply operation • Temperature Range — 0 °C to +70°C — –40 °C to +85°C — –40 °C to +125°C • Development Support — Real-time emulation and full program debug capabili- ties available — CompactRISC tools provide C programming and de- bugging support |
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