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SIP824SEUDT-TR1 Datasheet(PDF) 4 Page - Vishay Siliconix |
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SIP824SEUDT-TR1 Datasheet(HTML) 4 Page - Vishay Siliconix |
4 / 6 page SiP823/SiP824/SiP825 Vishay Siliconix www.vishay.com 4 Document Number: 72397 S-41150—Rev. B, 14-Jun-04 PIN DESCRIPTION SiP823 SiP824 SiP825 Name Description 1 1 1 RESET RESET is active low. This pin has a push/pull output. 2 2 2 GND Ground N/A 3 3 RESET RESET is active high. This pin has a push/pull output. 3 N/A 4 MR Manual RESET. Active low. Pulling this pin low forces a RESET. After a low to high transition RESET remains asserted for exactly one RESET timed period. This pin is internally pulled high. If this function is unused it can be left open or tied to VCC. 4 4 N/A WDI Watchdog Input. Any transition on this pin will RESET the watchdog timer. If this pin remains high or low for longer than the watchdog interval, a RESET is asserted. Float or tristate this pin to disable the watchdog feature. 5 5 5 VCC Positive power supply. A RESET is asserted after this voltage drops below a predetermined level. After VCC rises above that level, RESET remains asserted until the end of the RESET time-out period. TIMING DIAGRAMS 50% 50% 50% 50% VCC VCC RESET RESET Figure 1. RESET Timing Diagram Figure 2. Watchdog Timing Diagram tD2 tWD tD2 WDI RESETB VDD tD2 tD2 tD1 tD1 VTH VTH VTH |
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