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Functional Description

The USB1T1102 transceiver is designed to convert CMOS

data into USB differential bus signal levels and to convert

USB differential bus signal to CMOS data.

To minimize EMI and noise the outputs are edge rate con-

trolled with the rise and fall times controlled and defined for

full speed data rates only (12Mbits/s). The rise, fall times

are balanced between the differential pins to minimize

skew.

The USB1T1102 differs from earlier USB Transceiver in

than discrete input and output pins. Table 1 describes the

specific pin functionality selection. Table 2 and Table 3

describe the specific Truth Tables for Driver and Receiver

operating functions.

The USB1T1102 also has the capability of various power

supply configurations to support mixed voltage supply

applications (see Table 4) and Section 2.1 for detailed

descriptions.

Functional Tables

TABLE 1. Function Select

Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors.

Note 2: For SUSPND

= HIGH mode the differential receiver is inactive and the output RCV is forced LOW. The out-of-suspend signaling (K) is detected via

TABLE 2. Driver Function (OE

= L) using Differential Input Interface

Note 3: SE0

= Single Ended Zero

TABLE 3. Receiver Function (OE

= H)

X

= Don’t Care

Terminal Number

Terminal

Name

I/O

Terminal Description

MLP14

MLP16

13

15

Pull-up Supply Voltage (3.3V

± 10%):

Connect an external 1.5k

Ω resistor on D+ (FS data rate);

Pin function is controlled by Config input pin:

Config

= LOW − V

Config

= HIGH − V

14

16

Config

I

USB connect or disconnect software control input.

Configures 3.3V to external 1.5k

Ω resistor on D+ when HIGH.

Exposed

Diepad

Exposed

Diepad

GND

GND

GND supply down bonded to exposed diepad to be connected to the PCB GND.

SUSPND

OE

D

+, D−

RCV

Function

L

L

Driving &

Receiving

Active

(Differential Receiver Active)

L

H

Receiving

(Note 1)

Active

H

L

Driving

Inactive

(Note 2)

(Differential Receiver Inactive)

HH

3-STATE

(Note 1)

Inactive

(Note 2)

Data

L

L

SE0 (Note 3)

L

H

Differential Logic 1

H

L

Differential Logic 0

H

H

Illegal State

D

+, D−

RCV

Differential Logic 1

H

H

L

Differential Logic 0

L

L

H

SE0

X

L

L