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GLT41316-30J3 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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GLT41316-30J3 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers |
1 / 22 page G -LINK GLT41316 64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE June 1998 (Rev 2) G-Link Technology Corporation 2701Northwestern Parkway Santa Clara, CA 95051, U.S.A. G-Link Technology Corporation, Taiwan 2F, No.12, R&D Rd. II, Science-Based Industrial Park, Hsin Chu, Taiwan, R.O.C. - 1 - Features : Description : ∗ 65,536 words by 16 bits organization. ∗ Fast access time and cycle time. ∗ Dual WE Input. ∗ Low power dissipation. ∗ Read-Modify-Write, RAS -Only Refresh, CAS -Before- RAS Refresh, Hidden Refresh and Test Mode Capability. ∗ 256 refresh cycles per 4ms. ∗ Available in 40-pin 400 mil SOJ,and 40/44 pin TSOP (II). ∗ Single 5.0V ±10% Power Supply. ∗ All inputs and Outputs are TTL compatible. ∗ Fast Page Mode operation. The GLT41316 is a 65,536 x 16 bit high- performance CMOS dynamic random access memory. The GLT41316 offers Fast Page mode ,and has both BYTE WRITE and WORD WRITE access cycles via two WE pins. The GLT41316 has symmetric address and accepts 256-cycle refresh in 4ms interval. All inputs are TTL compatible. Fast Page Mode operation allows random access up to 256x16 bits, within a page, with cycle times as short as 18ns. The GLT41316 is best suited for graphics, and DSP applications requiring high performance memories. HIGH PERFORMANCE 30 35 40 45 Max. RAS Access Time, (tRAC) 30 ns 35 ns 40 ns 45 ns Max. Column Address Access Time, (tAA) 15 ns 18 ns 20 ns 22 ns Min. Fast Page Mode Cycle Time, (tPC) 18 ns 21 ns 23 ns 25 ns Min. Read/Write Cycle Time, (tRC) 65 ns 70 ns 75 ns 80 ns Max. CAS Access Time (tCAC) 10 ns 11 ns 12 ns 12 ns |
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