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COMMERCIALANDINDUSTRIALTEMPERATURERANGES

IDT2308

3.3V ZERO DELAY CLOCK MULTIPLIER

APRIL 2003

2003

Integrated Device Technology, Inc.

DSC 5173/9

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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEATURES:

• Phase-Lock Loop Clock Distribution for Applications ranging

from 10MHz to 133MHz operating frequency

• Distributes one clock input to two banks of four outputs

• Separate output enable for each output bank

• External feedback (FBK) pin is used to synchronize the outputs

to the clock input

• Output Skew <200 ps

• Low jitter <200 ps cycle-to-cycle

• 1x, 2x, 4x output options (see table):

– IDT2308-1 1x

– IDT2308-2 1x, 2x

– IDT2308-3 2x, 4x

– IDT2308-4 2x

– IDT2308-1H, -2H, and -5H for High Drive

• No external RC network required

• Available in SOIC and TSSOP packages

FUNCTIONAL BLOCK DIAGRAM

DESCRIPTION:

The IDT2308 is a high-speed phase-lock loop (PLL) clock multiplier. It is

designedtoaddresshigh-speedclockdistributionandmultiplicationapplica-

tions.Thezerodelayisachievedbyaligningthephasebetweentheincoming

clock and the output clock, operable within the range of 10 to 133MHz.

TheIDT2308hastwobanksoffouroutputseachthatarecontrolledviatwo

selectaddresses.Byproperselectionofinputaddresses,bothbankscanbe

put in tri-state mode. In test mode, the PLL is turned off, and the input clock

directly drives the outputs for system testing purposes. In the absence of an

inputclock,theIDT2308enterspowerdown,andtheoutputsaretri-stated.In

this mode, the device will draw less than 25µA.

The IDT2308 is available in six unique configurations for both pre-

scaling and multiplication of the Input REF Clock. (See available options

table.)

ThePLLisclosedexternallytoprovidemoreflexibilitybyallowingtheuser

tocontrolthedelaybetweentheinputclockandtheoutputs.

TheIDT2308ischaracterizedforbothIndustrialandCommercialoperation.

NOTE: For new designs, refer to AN-233.

IDT2308

3.3V ZERO DELAY

CLOCK MULTIPLIER

PLL

S1

2

14

15

3

CLKA1

CLKA2

CLKA3

CLKA4

6

10

11

CLKB1

CLKB2

CLKB3

CLKB4

9

FBK

16

Control

Logic

7

8

1

REF

S2

(-2, -3)

(-3, -4)

(-5)

2

2

2