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TMC222-PI20 Datasheet(PDF) 5 Page - TRINAMIC Motion Control GmbH & Co. KG. |
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TMC222-PI20 Datasheet(HTML) 5 Page - TRINAMIC Motion Control GmbH & Co. KG. |
5 / 48 page TMC222 DATASHEET (V. 1.12 / March 7, 2011) 5 Copyright © 2004-2009 TRINAMIC Motion Control GmbH & Co. KG 2 General Description 2.1 Block Diagramm Oscillator PWM regulator X PWM regulator Y Charge Pump Reference Voltage & Thermal Monitoring OA1 OA2 OB1 OB2 Main control Registers OTP + ROM Decoder Sinewave table DACs Position Controller VCP CP2 CP1 Serial Interface Controller Test Two Wire Serial Interface Voltage Regulator SWI SDA HW TST VBAT VDD & SCL 2.2 Position Controller / Main Control Motor parameters, e.g. acceleration, velocity and position parameters are passed to the main control block via the serial interface. These information are stored internally in RAM or OTP memory and are accessible by the position controller. This block takes over all time critical tasks to drive a stepper motor to the desired position under abiding the desired motion parameters. The main controller gets feedback from the stepper motor driver block and is able to arrange internal actions in case of possible problems. Diagnostics information about problems and errors are transferred to the serial interface block. 2.3 Stepper Motor Driver Two H-bridges are employed to drive both windings of a bipolar stepper motor. The internal transistors can reach an output current of up to 800 mA. The PWM principle is used to force the given current through the coils. The regulation loop performs a comparison between the sensed output current and the internal reference. The PWM signals to drive the power transistors are derived from the output of the current comparator. 2.4 Two Wire Serial Interface Communication between a host and the TMC222 takes places via the two wire bi-directional serial interface. Motion instructions and diagnostics information are provided to or from the Main Control block. It is possible to connect up to 32 devices on the same bus. Slave addresses are programmable via OTP memory or an external pin. |
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