UCC29002

UCC39002

SLUS495C − SEPTEMBER 2001 − REVISED JULY 2003

9

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FUNCTIONAL DESCRIPTION

start up and adjust logic

The start up and adjust logic responds to unusual operating conditions during start up, fault and disable. Under

these circumstances the information obtainable by the error amplifier of the UCC39002 is not sufficient to make

the right output voltage adjustment, therefore the adjust amplifier is forced to certain known states. Similarly,

the driver amplifier of UCC39002 is disabled during these conditions.

During start up, the load share driver amplifier is disabled by the disconnect switch and the adjust amplifier is

forced to sink the maximum current through the adjust resistor. This operating mode ensures that the module

controlled by the UCC39002 will be able to engage in sharing the load current since its output will be adjusted

to a sufficiently high voltage. Both the load share driver and the adjust amplifiers revert to normal operation as

soon as the measured current exceeds 80% of the average per module current level represented by the bus

voltage.

In case of a fault shorting the load share bus to ground or to the bias of the UCC39002 the load share bus driver

and the adjust amplifiers are disabled. The same action takes place when the UCC39002 is disabled using the

CS+ and CS− pins or when the bias voltage is below the minimum operating voltage.

bias and bias OK circuit (VDD)

The UCC39002 is built on a 15-V, high performance BiCMOS process. Accordingly the maximum voltage across

voltage is 13.5 V which corresponds to the tolerance of the on-board 14.2-V Zener clamp circuit. In case the

bias voltage could exceed the 13.5-V limit, the UCC39002 should be powered through a current limiting resistor.

UDG−02089

4

GND

3

VDD

+

Bias_OK

VBIAS

(Internal Bias)

14.2 V

4.375 V

The UCC39002 does not have an undervoltage lockout circuit. The bias OK comparator works as an enable

might be inconvenient for some low voltage applications it is necessary to ensure high accuracy. The load share

accuracy is dependent on working with relatively large signal amplitudes on the load share bus. If the internal

offsets, current sense error and ground potential difference between the UCC39002 controllers are comparable

in amplitude to the load share bus voltage, they can cause significant current distribution error in the system.

To circumvent this potential design problem, the UCC39002 won’t operate below the above mentioned 4.375-V

bias voltage threshold. If the system does not have a suitable bias voltage available to power the UCC39002,

it is recommended to use an inexpensive charge pump which can generate the bias voltage for all the

UCC39002s in the load share system.