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82V3012 Datasheet(PDF) 5 Page - Integrated Device Technology |
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82V3012 Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 32 page List of Figures 5 February 6, 2009 LIST OF FIGURES Figure - 1 IDT82V3012 SSOP56 Package Pin Assignment ................................................................................................................................ 2 Figure - 2 State Control Circuit .......................................................................................................................................................................... 10 Figure - 3 State Control Diagram....................................................................................................................................................................... 10 Figure - 4 TIE Control Block Diagram................................................................................................................................................................ 12 Figure - 5 Reference Switch with TIE Control Block Enabled............................................................................................................................ 13 Figure - 6 Reference Switch with TIE Control Block Disabled........................................................................................................................... 13 Figure - 7 DPLL Block Diagram......................................................................................................................................................................... 14 Figure - 8 Clock Oscillator Circuit ...................................................................................................................................................................... 15 Figure - 9 Power-Up Reset Circuit..................................................................................................................................................................... 16 Figure - 10 IDT82V3012 Power Decoupling Scheme.......................................................................................................................................... 16 Figure - 11 Timing Parameter Measurement Voltage Levels .............................................................................................................................. 27 Figure - 12 Input to Output Timing (Normal Mode).............................................................................................................................................. 29 Figure - 13 Output Timing 1................................................................................................................................................................................. 30 Figure - 14 Output Timing 2................................................................................................................................................................................. 31 Figure - 15 Input Control Setup and Hold Timing ................................................................................................................................................ 31 |
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