NCP1217, NCP1217A

www.onsemi.com

3

Figure 2. Internal Circuit Architecture

Overload

Management

UVLO High and Low

±500 mA

HV Current

Source

8

7

6

5

HV

NC

Drv

1

2

3

4

Q Flip−Flop

DCmax = 74%

Q

250 ns

L.E.B.

65−100−133 kHz

Clock

-

+

-

+

80 k

20 k

57 k

1 V

Current

Sense

Ground

FB

Adj

24 k

25 k

+

−

Reset

1.1 V

Skip Cycle

Comparator

Set

19 k

Ramp

Compensation

Reset

-

+

Latchoff

Comparator

+

−

Latch

Reset

Set

3.1 V

UVLO

1ms SS*

* Available for “A” version only

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

Power Supply Voltage

16

V

−

−0.3 to 10

V

500

V

450

V

Minimum Operating Voltage on Pin 8 (HV)

28

V

−

5.0

mA

Thermal Resistance, Junction−to−Case

57

°C/W

Thermal Resistance, Junction−to−Air, PDIP−7 Version

Thermal Resistance, Junction−to−Air, SO−8 Version

100

178

°C/W

Maximum Junction Temperature

150

°C

Temperature Shutdown

−

155

°C

Hysteresis in Shutdown

−

30

°C

Storage Temperature Range

−

−60 to +150

°C

−

2.0

kV

ESD Capability, Machine Model

−

200

V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. This device series contains ESD protection rated using the following tests:

Human Body Model (HBM) 2000 V per JEDEC Standard JESD22, Method A114E.

Machine Model (MM) 200 V per JEDEC Standard JESD22, Method A115A.