NCV4279B

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8

APPLICATION NOTES

FLAG MONITOR

Figure 14 shows the FLAG Monitor waveforms as a result

of the circuit depicted in Figure 13. As the output voltage

the voltage on the FLAG output to go low sending a warning

signal to the microprocessor that a RESET signal may occur

microprocessor has to complete the function it is currently

working on and get ready for the RESET shutdown signal.

Figure 14. FLAG Monitor Circuit Waveform

MON

RESET

FLAG Monitor

Ref. Voltage

FLAG

SETTING THE DELAY TIME

The delay time is controlled by the Reset Delay Low

Voltage, Delay Switching Threshold, and the Delay Charge

Current. The delay follows the equation:

tDELAY +

[CDELAY(Vdt * Reset Delay Low Voltage)]

Delay Charge Current

Example:

Assume reset Delay Low Voltage = 0.

Use the typical value for Delay Charge Current = 2.5

mA.

tDELAY +

[33 nF(1.8

* 0)]

2.5

mA

+ 23.8 ms

STABILITY CONSIDERATIONS

The output or compensation capacitor helps determine

three main characteristics of a linear regulator: start−up

delay, load transient response and loop stability.

The capacitor value and type should be based on cost,

availability, size and temperature constraints. A tantalum or

aluminum electrolytic capacitor is best, since a film or

ceramic capacitor with almost zero ESR can cause

instability. The aluminum electrolytic capacitor is the least

expensive solution, but, if the circuit operates at low

temperatures (−25

°C to −40°C), both the value and ESR of

the capacitor will vary considerably. The capacitor

manufacturers data sheet usually provides this information.

should work for most applications, however it is not

necessarily the optimized solution.

Figure 15. Test and Application Circuit Showing

Output Compensation

10

mF

RESET

0.1

mF

NCV4279B

temperature expected.

CALCULATING POWER DISSIPATION IN A

SINGLE OUTPUT LINEAR REGULATOR

The maximum power dissipation for a single output

regulator (Figure 16) is:

PD(max) + [VIN(max) * VOUT(min)]IOUT(max)

(1)

) VIN(max)IQ

where:

application, and

R

qJA +

150

°C * TA

PD

(2)

package section of the data sheet. Those packages with

the die temperature below 150

°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

SMART

REGULATOR

®

Control

Features

Figure 16. Single Output Regulator with Key

Performance Parameters Labeled

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