August 2004

9

MIC2214

MIC2214

Micrel

Functional Diagram

OUT1

OUT2

POR

DRV

NGND

GND

SW

CBYP

SET

EN

VIN

LDO1

LDO2

Reference

POR & Delay

SW Logic

MIC2214 Fixed Voltage Block Diagram

OUT1

OUT2

ADJ2

ADJ1

POR

DRV

NGND

GND

SW

CBYP

SET

EN1

VIN1

EN2

VIN2

LDO1

LDO2

Quickstart

Reference

POR & Delay

SW Logic

MIC2214 Adjustable Voltage Block Diagram

Functional Description

The MIC2214 is a high performance, low quiescent current

power management IC consisting of two

µCap low dropout

regulators, a power-on reset (POR) circuit and an open-drain

driver. The first regulator is capable of sourcing 150mA at

output voltages from 1.25V to 5V. The second regulator is

capable of sourcing 300mA of current at output voltages from

1.25V to 5V. The second regulator has a POR circuit that

monitors its output voltage and indicates when the output

voltage is within 5% of nominal. The POR offers a delay time

that is externally programmable with a single capacitor to

ground. An open-drain driver completes the power manage-

ment chipset, offering the capability of driving LEDs for

keypad backlighting in applications such as cellphones.

Enable

The enable input allows for logic control of both output

voltages with one enable input. The enable input is active

high, requiring 1.8V for guaranteed operation. The enable

input is CMOS logic and cannot by left floating.

Power-On Reset (POR)

The power-on reset output is an open-drain N-Channel

device, requiring a pull-up resistor to either the input voltage

or output voltage for proper voltage levels. The POR output

has a delay time that is programmable with a capacitor from

the SET pin to ground. The delay time can be programmed to

be as long as 1 second.

The SET pin is a current source output that charges a

capacitor that sets the delay time for the power-on reset

output. The current source is a 1

µA current source that

charges a capacitor up from 0V. When the capacitor reaches

1.25V, the output of the POR is allowed to go high.

Open-Drain Driver (DRV)

The drive (DRV) pin is an open-drain output capable of

sinking 150mA of current. This output is controlled by a logic

level input, the switch (SW) pin. The switch pin is an active

high input and cannot be left floating.