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CLC5523I Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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CLC5523I Datasheet(HTML) 5 Page - National Semiconductor (TI) |
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5 / 12 page  5 http://www.national.com The key features of the CLC5523 are: s Low Power s Broad voltage controlled gain and attenuation range s Bandwidth independent, resistor programmable gain range s Broad signal and gain control bandwidths s Frequency response may be adjusted with Rf s High Impedance signal and gain control Inputs The CLC5523 combines a closed loop input buffer, a volt- age controlled variable gain cell and an output amplifier. The input buffer is a transconductance stage whose gain is set by the gain setting resistor, Rg. The output amplifi- er is a current feedback op amp and is configured as a transimpedance stage whose gain is set by, and equal to, the feedback resistor, Rf. The maximum gain, Avmax, of the CLC5523 is defined by the ratio; Rf /Rg. As the gain control input (VG) is adjusted over its 0 to 2V range, the gain is adjusted over a range of 80dB relative to the maximum set gain. Setting the CLC5523 Maximum Gain Although the CLC5523 is specified at Avmax = 10, the recommended Avmax varies between 2 and 100. Higher gains are possible but usually impractical due to output offsets, noise and distortion. When varying Avmax several tradeoffs are made: Rg: determines the input voltage range Rf: determines overall bandwidth The amount of current which the input buffer can source into Rg is limited and is specified in the IR gmax spec. This sets the maximum input voltage: The effects of maximum input range on harmonic distortion are illustrated in the Input Harmonic Distortion plot. Variations in Rg will also have an effect on the small signal bandwidth due to its loading of the input buffer and can be seen in Frequency Response vs. Rg. Changes in Rf will have a more dramatic effect on the small signal bandwidth. The output amplifier of the CLC5523 is a current feedback amplifier(CFA) and its bandwidth is determined by Rf. As with any CFA, doubling the feed- back resistor will roughly cut the bandwidth of the device in half (refer to the plot Frequency Response vs. Rf). For more information covering CFA’s, there is a basic tutorial, OA-20, Current Feedback Myths Debunked or a more rigorous analysis, OA-13, Current Feedback Amplifier Loop Gain Analysis and Performance Enhancements. Using the CLC5523 in AGC Applications In AGC applications, the control loop forces the CLC5523 to have a fixed output amplitude. The input amplitude will vary over a wide range and this can be the issue that limits dynamic range. At high input amplitudes, the distortion due to the input buffer driving Rg may exceed that which is produced by the output amplifier driving the load. In the plot, Harmonic Distortion vs. Gain, second and third harmonic distortion are plotted over a gain range of nearly 40dB for a fixed output amplitude of 100mVpp in the specified configuration, Rf = 1k, Rg = 100W. When the gain is adjusted to 0.1 (i.e. 40dB down from Avmax), the input amplitude would be 1Vpp and we can see the distortion is at its worst at this gain. If the output amplitude of the AGC were to be raised above 100mV, the input amplitudes for gains 40dB down from Avmax would be even higher and the distortion would degrade further. It is for this reason that we recommend lower output amplitudes if wide gain ranges are desired. Using a post-amp like the CLC404 or CLC409 would be the best way to preserve dynamic range and yield output amplitudes much higher than 100mVpp. Another way of addressing distortion performance and its limitations on dynamic range, would be to raise the value of Rg. Just like any other high-speed amplifier, by increasing the load resistance, and therefore decreasing the demanded load current, the distortion performance will be improved in most cases. With an increased Rg, Rf will also have to be increased to keep the same Avmax and this will decrease the overall bandwidth. Gain Partitioning If high levels of gain are needed, gain partitioning should be considered. Figure 1: Gain Partitioning The maximum gain range for this circuit is given by the following equation: CLC5523 Operation A R R vmax f g = V (max) I R in R max g g =× CLC5523 Rf Rg 2 3 4 1 VG 6 7 25 W + - CLC425 Vin R1 R2 25 Wž Rc Vo maximum gain 1 R R R R 2 1 f g =+ æ èç ö ø÷ × æ è ç ö ø ÷ |
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Similar Description - CLC5523I |
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