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LTC4064EMSE Datasheet(PDF) 10 Page - Linear Technology |
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LTC4064EMSE Datasheet(HTML) 10 Page - Linear Technology |
10 / 16 page LTC4064 10 4064f Programming The Timer The programmable timer is used to terminate the charge cycle. The timer duration is programmed by an external capacitor at the TIMER pin. The total charge time is: Time (Hours) = (3 Hours) • (CTIMER/0.1µF) or CTIMER = 0.1µF • Time (Hours)/3 (Hours) The timer starts when an input voltage greater than the undervoltage lockout threshold level is applied and the SHDN pin is greater than the manual shutdown threshold voltage level. After a time-out occurs, the charge current stops, and the CHRG output assumes a high impedance state to indicate that the charging has stopped. Connect- ing the TIMER pin to ground disables the timer function. Recharge After a charge cycle has terminated, if the battery voltage drops below the recharge threshold of 3.90V a new charge cycle will begin. The recharge circuit integrates the BAT pin voltage for a few milliseconds to prevent a transient from restarting the charge cycle. If the battery voltage remains below 2.48V during trickle charge for 1/4 of the programmed time, the battery may be defective and the charge cycle will end. In addition, the recharge comparator is disabled and a new charge cycle will not begin unless the input voltage is toggled off-then- on, the SHDN pin is momentarily pulled to ground, or the BAT pin is pulled above the 2.48V trickle charge threshold. Open-Drain Status Outputs The LTC4064 has three open-drain status outputs: ACPR, CHRG and FAULT. The ACPR pin pulls low when an input voltage greater than the undervoltage lockout threshold is applied and becomes high impedance when power (VIN < VUV) is removed. CHRG and FAULT work together to indicate the status of the charge cycle. Table 1 describes the status of the charge cycle based on the CHRG and FAULT outputs. APPLICATIO S I FOR ATIO Table 1. FAULT CHRG Description High Low Charge cycle has started, C/10 has not been reached and charging is proceeding normally. Low Low Charge cycle has started, C/10 has not been reached, but the charge current and timer have been paused due to an NTC out-of- temperature condition. High 30 µA C/10 has been reached and charging is pull-down proceeding normally. Low 30 µA C/10 has been reached but the charge current pull-down and timer have paused due to an NTC out-of- temperature condition. High High Normal timeout (charging has terminated). Low High If FAULT goes low and CHRG goes high impedance simultaneously, then the LTC4064 has timed out due to a bad cell (VBAT <2.48V after one-quarter the programmed charge time). If CHRG goes high impedance first, then the LTC4053 has timed out normally (charging has terminated), but NTC is indicating an out- of-temperature condition. CHRG Status Output Pin When the charge cycle starts, the CHRG pin is pulled to ground by an internal N-channel MOSFET capable of driving an LED. When the charge current drops to 10% of the full-scale current (C/10), the N-channel MOSFET is latched off and a weak 30 µA current source to ground is connected to the CHRG pin. After a time-out occurs, the pin assumes a high impedance state. By using two different value pull-up resistors a microprocessor can detect three states from this pin (charging, C/10 and time- out). See Figure 3. When the LTC4064 is in charge mode, the CHRG pin is pulled low by the internal N-channel MOSFET. To detect this mode, force the digital output pin, OUT, high and measure the voltage at the CHRG pin. The N-channel MOSFET will pull the pin low even with the 2k pull-up resistor. Once the charge current drops to 10% of the |
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