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PCM1715U Datasheet(PDF) 6 Page - Burr-Brown (TI) |
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PCM1715U Datasheet(HTML) 6 Page - Burr-Brown (TI) |
6 / 9 page PCM1715U 6 ® 0 –100 –120 –140 –160 0 5 10 15 20 Frequency (kHz) 0 –100 –120 –140 –160 0 5 10 15 20 Frequency (kHz) THEORY OF DELTA-SIGMA OPERATION The delta-sigma section of the PCM1715 is based on a 5- level amplitude quantizer and a 4th-order filter. This con- verts the oversampled 16-bit input data to 5-level delta- sigma form. A block diagram of the 5-level modulator is shown in Figure 1. FIGURE 3. Quantization Noise Spectrum (256fs). FIGURE 4. Quantization Noise Spectrum (384fs). FIGURE 2. Block Diagram of the Hf(z). A block diagram of the 4th-order filter section Hf(z) in the delta-sigma modulator is shown in Figure 2. In general, high order 1-bit delta-sigma modulators have disadvantages due to loop instability. The 5 level delta- sigma modulator of the PCM1715 uses phase compensation techniques to obtain stable operation. In Figure 2, the coef- ficients, b1 to b4, give the basic form of the filter and –a1 and –a2 are used for phase compensation of the feedback loop. The theoretical quantization noise performance of the 5- level delta-sigma modulator is shown in Figures 3 and 4. In the audio band, the quantization noise floor level of the PCM1715 is less than –130dB (384fs). MODE OF OPERATION Serial inputs to MD, MC, and ML (Pins 26, 27 and 28) control the following functions: (1) Digital Attenuator [AL0 ~ AL7, AR0 ~ AR7] Attenuation data is constructed by 8-bit/Lch, 8-bit/Rch (total 16-bit), can be controlled as 255 step attenuation by individual channel. AL0 and AR0 are LSB, and AL7 and AR7 are MSB. Attenuation Level ATT is given by: ATT = 20LOG10 (ATT DATA/255) [dB] FIGURE 1. Block Diagram of 5-Level Delta-Sigma Quan- tizer. This 5-level delta-sigma modulator has the advantage of stability of delta-sigma loop and jitter sensitivity over the typical 1-bit (2-level) delta-sigma modulator. The combined oversampling rate of the delta-sigma modu- lator and the internal 8x oversampling digital filter is 48fs at a system clock speed of 384fs, 32fs at a system clock speed of 256fs. In Out + + – + 4 3 2 1 0 Hf(Z) 5-level Quantizer 32fs/48fs 5-level 8fs/ 16 bits Out In –a1 Z–1 Z–1 Z–1 Z–1 b4 b3 b2 b1 –a2 ++ ++ + ++ + |
Similar Part No. - PCM1715U |
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Similar Description - PCM1715U |
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