cui.com

date 11/07/2014

│ page 4 of 14

CUI Inc

│ MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER

LOGIC INPUT/OUTPUT CHARACTERISTICS

parameter

conditions/description

min

typ

max

units

input high voltage (V

CTRL, DDC, SA0, SCL, SDA, SYNC, VSET

2

V

input low voltage (V

CTRL, DDC, SA0, SCL, SDA, SYNC, VSET

0.8

V

output high voltage (V

DDC, SALRT, SDA, SYNC, PG

2.25

V

output low voltage (V

DDC, SALRT, SDA, SYNC, PG

0.4

V

OUTPUT DECOUPLING CAPACITOR RECOMMENDATION

parameter

conditions/description

min

typ

max

units

C

OUT

total output capacitance located on host board

300

15,000

µF

DDC CONFIGURATION REQUIREMENTS

A pull-up resistor is required on the DDC in order to guarantee the rise time as follows:

Rise Time

R

supply. The designer needs to ensure that the resistor pull-up voltage is present during module power-up. Each module connected to

the DDC presents ~10 pF, each inch of FR4 PCB trace introduces ~2 pF of capacitive loading.

SMBUS CONFIGURATION REQUIREMENTS

The complete specifications for the SMBus can be found on the following web pages: www.pmbus.info , smbus.org

TYPICAL CHARACTERISTICS

Conditions (applies to all graphs unless stated otherwise):

T

For more information, please visit the product page.